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| 型号： | TPS51727RHARG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封装： | 6 X 6 MM, GREEN, PLASTIC, QFN-40 |
| 文件页数： | 34/42页 |
| 文件大小： | 0K |
| 代理商： | TPS51727RHARG4 |
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ELECTRICAL CHARACTERISTICS
SLUS806B – APRIL 2008 – REVISED JANUARY 2009 ..................................................................................................................................................... www.ti.com
over recommended free-air temperature range, V5IN = V5FILT = 5.0 V GFB = PGND = GND, VFB = VOUT (Unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY: CURRENTS, UVLO AND POWER-ON RESET
IV5
V5IN + V5FILT supply current
VDAC < VFB < VDAC + 100 mV, EN = HI
2.5
4.0
mA
IV5STBY
V5IN + V5FILT standby current
EN = LO
1
A
V5FILT = V5IN, VFB < 200 mV, Ramp up;
VUVLOH
V5FILT UVLO OK threshold
4.25
4.40
4.50
V
EN = HI; Switching begins
V5FILT = V5IN. Ramp down; EN = HI, VFB = 100 mV,
VUVLOL
V5FILT UVLO fault threshold
Restart if 5 V dips below VPOR then rises > VUVLOH
4.05
4.15
4.30
V
or VEN is toggled with 5 V > VUVLOH
V5FILT=V5IN, Ramp Down, EN = HI, Can restart if 5V goes
VPOR
V5FILT fault latch reset threshold
1.60
1.89
2.25
V
up to VUVLOH and no other faults present
REFERENCES: DAC, VREF, VBOOT AND DRVL DISCHARGE
VVIDSTP
VID Step Size
Change VID0 HI to LO to HI
25
mV
VDAC1
VFB No Load Active
0.750 V
≤ VFB ≤ 1.250 V, +15°C ≤ TJ ≤ 105°C
–0.55%
0.55%
VDAC2
VFB No Load Active/Sleep
0.500 V
≤ VFB ≤ 0.750 V
–8
8
mV
VDAC3
VFB Deeper Sleep
0.300V
≤ VFB ≤ 0.500 V
–12
12
mV
VVREF
VREF Output
V5FILT = 4.5 V to 5.5 V, IREF = 0
1.675
1.710
1.745
V
VVREFSRC
VREF Output Source
IREF = 0
A to 250 A
–9
–3
mV
VVREFSNK
VREF Output Sink
IREF = –250
A to 0 A
10
35
mV
VDLDQ
DRVL Discharge Threshold
VFB < 200 mV, DRVL goes high for 1ms
200
250
325
mV
VOLTAGE SENSE: VFB AND GFB
Not in Fault, Disable or UVLO;
IVFB
VFB Input Bias Current
9
20
A
VFB = 2 V, GFB = 0 V
IVFBDQ
VFB Input Bias Current, Discharge
Fault, Disable or UVLO, VFB = 100 mV
90
125
175
A
IGFB
GFB Input Bias Current
Not in Fault, Disable or UVLO; VFB = 2 V, GFB = 0 V
–20
–8
A
VDELGND
GFB Differential
±300
mV
AGAINGND
GFB/GND Gain
0.993
1.000
1.007
V/V
VVFBCOM
VFB Common Mode Input
–0.3
2.0
V
CURRENT SENSE: OVERCURRENT, ZERO CROSSING, VOLTAGE POSITIONING AND PHASE BALANCING
TRIPSEL = GND
7.3
11.0
15.5
TRIPSEL = REF
10.7
14.3
19.2
OCP Voltage Set
VOCPP
mV
(Valley Current Limit)
TRIPSEL = 3.3 V
14.3
18.2
22.9
TRIPSEL = V5FILT
19.7
23.8
28.4
TRIPSEL = GND
10.3
14.9
19.0
TRIPSEL = REF
15.4
20.0
24.5
Negative OCP Voltage
VOCPN
mV
(Minimum Magnitude)
TRIPSEL = 3.3 V
20.4
25.0
29.8
TRIPSEL = V5FILT
27.3
31.7
37.0
VOCPCC
Channel-to-Channel OCP matching
(VCSP1–VCSN1) – (VCSP2–VCSN2) at OCP for each channel
±1.0
mV
ICS
CS Pin Input Bias Current
CSPx and CSNx
–1.00
0.02
1.00
A
VZXOFF
Zero Crossing Comp. Internal Offset
CSPx – CSNx, SLP = High (Skip Mode)
–4.0
–0.8
4.0
mV
GM-DROOP
Droop Amplifier Transconductance
VFB = 1 V
485
500
515
S
IDROOP
Droop Amplifier Sink/Source Current
50
100
150
A
VDAC = 0.750 V;
IBAL_TOL
Internal Current Share Tolerance
–3%
3%
VCSP1 – VCSN1 = VCSP2 – VCSN2 = VOCP_MIN
ACSINT
Internal Current Sense Gain
Gain from CSPx – CSNx to PWM comparator
5.85
5.95
6.05
V/V
4
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS51727
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