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| 型号： | TPS51727RHARG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封装： | 6 X 6 MM, GREEN, PLASTIC, QFN-40 |
| 文件页数： | 18/42页 |
| 文件大小： | 0K |
| 代理商： | TPS51727RHARG4 |
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( )
VID
SS
V
t
s
SR
=
(4)
Soft Stop Control with Low Impedance Output Termination
Protection Features
www.ti.com ..................................................................................................................................................... SLUS806B – APRIL 2008 – REVISED JANUARY 2009
The soft start time to the voltage defined by the VID code at power-up is shown in Equation 4.
The voltage slewing capability is also used to slowly slew the voltage down for a soft-stop without undershoot.
The soft-stop rate equals the soft-start rate. As long as V5IN is available and EN toggles low, the TPS51727
slews from the current VID to 0.3 V. At this point, all DRVxx signals are held LO and an internal transistor
connected from VFB to AGND turns on to keep VOUT from floating up as a result of stray leakage currents.
The TPS51727 features full protection of the converter power chain as well as the system electronics.
Input Undervoltage Protection (UVLO)
The TPS51727 continuously monitors the voltage on the V5FILT pin to ensure the value is high enough to bias
the devices properly and provide sufficient gate drive potential to maintain high efficiency. The converter starts
with approximately 4.4 V and has a nominal 200 mV of hysteresis. This function is not latched, therefore
removing and restoring 5-V power to the device resets it. The power input (VBAT) does not include a UVLO
function, so the circuit runs with power inputs down to approximately 3 × VOUT.
Power Good Signals
The TPS51727 has an open-drain power good pin, PGOOD. The high threshold is nominally VDAC +200 mV;
the low threshold is nominally VDAC –300 mV. PGOOD goes inactive as soon as the EN pin is pulled low or an
undervoltage condition on VOUT is detected. It is masked during DAC transitions to prevent false triggering
during voltage slewing. When overvoltage protection is turned off, PGOOD continues to indicate an overvoltage
condition.
Output Overvoltage Protection (OVP)
In addition to the power good function described above, the TPS51727 has additional OVP and UVP thresholds
and protection circuits.
An OVP condition is detected when VOUT is greater than 200 mV greater than VDAC. In this case, the converter
sets PGOOD signal inactive, performs the soft-stop sequence, and then latches OFF. The converter remains in
this state until the device is reset by cycling either V5IN or EN. However, because of the dynamic nature of the
processor systems, the +200mV OVP threshold is “blanked” much of the time. In order to provide protection to
the processor 100% of the time, there is a second OVP level fixed at 1.7 V which is always active. If the fixed
OVP condition is detected, PGOOD is forced inactive and the DRVLx signals are driven HI. The converter
remains in this state until either V5IN or EN are cycled. OVP is disabled when the RSLEW is terminated to VREF
instead of GND. In this case, change the value of RSLEW as described in the Voltage Slewing section above.
Ouptut Undervoltage Protection (UVP)
Output undervoltage protection works in conjunction with the current protection described below. If VOUT drops
below the low PGOOD threshold for 80
s, then the converter enters soft-stop mode and latches OFF at the
completion of soft stop.
Copyright 2008–2009, Texas Instruments Incorporated
25
Product Folder Link(s): TPS51727
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