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参数资料
| 型号： | TPS51727RHARG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封装： | 6 X 6 MM, GREEN, PLASTIC, QFN-40 |
| 文件页数： | 41/42页 |
| 文件大小： | 0K |
| 代理商： | TPS51727RHARG4 |
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DEVICE INFORMATION
TERMINAL CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
30
29
28
27
26
25
24
23
22
21
40
39
38
37
36
35
34
33
32
31
T
H
A
L
P
D
1
P
C
N
T
D
A
C
S
P
D
2
V
ID
4
V
ID
3
V
ID
2
V
ID
1
V
ID
0
V
5
F
IL
T
IS
L
E
W
O
S
R
S
E
L
T
O
N
S
E
L
T
R
IP
S
E
L
P
M
O
N
E
N
/C
S
L
P
G
O
D
DROOP
VREF
GND
CSP1
CSN1
CSN2
CSP2
GFB
VFB
THRM
TPS51727
RHA PACKAGE
DRVH1
VBST1
LL1
DRVL1
V5IN
PGND
DRVL2
LL2
VBST2
DRVH2
SLUS806B – APRIL 2008 – REVISED JANUARY 2009 ..................................................................................................................................................... www.ti.com
RHA Package Terminal Configuration
(Top View)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
CSN1
5
Negative current sense inputs. Connect to the most negative node of current sense resistor or inductor DCR
I
sense RC network.
CSN2
6
CSP1
4
Positive current sense inputs. Connect to the most positive node of current sense resistor or inductor DCR
I
sense RC network.
CSP2
7
DACS
14
I
DAC range selection input. Tie to V5FILT.
Output of GM error amplifier. A resistor to VREF sets the droop gain. A capacitor to VREF helps shape the
DROOP
1
O
transient response.
DRVH1
30
O
Top N-channel MOSFET gate drive outputs
DRVH2
21
DRVL1
27
O
Synchronous N-channel MOSFET gate drive outputs.
DRVL2
24
EN
34
I
Enable signal. 3.3V I/O level; 100ns de-bounce. Regulator enters controlled “soft-stop” when brought low.
Voltage sense return. Tie to GND with a 100-
Ω resistor to close feedback when voltage sensing through a
GFB
8
I
socket.
GND
3
-
Analog / signal ground. Tie to quiet ground plane.
Precision slew rate control setting. All voltage transitions, including start-up and shutdown, occur at the rated
ISLEW
39
I
defined by the ISLEW resistor. Tie the ISLEW resistor to GND to enable OVP or VREF to disable OVP.
LL1
28
I/O
Top N-channel MOSFET gate drive return. Also, input for adaptive gate drive timing.
LL2
23
N/C
33
-
Do not connect anything to this pin
8
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS51727
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