SWCS037G
– MAY 2008 – REVISED APRIL 2011
List of Figures
1-1
TPS65920 Block Diagram
.......................................................................................................
121-2
TPS65930 Block Diagram
.......................................................................................................
122-1
PBGA Bottom View
..............................................................................................................
134-1
Power Provider Block Diagram
.................................................................................................
274-2
VDD1 dc-dc Regulator Efficiency
..............................................................................................
304-3
VDD1 dc-dc Application Schematic
............................................................................................
314-4
VDD2 dc-dc Regulator Efficiency
..............................................................................................
334-5
VDD2 dc-dc Application Schematic
............................................................................................
344-6
VIO dc-dc Regulator Efficiency
.................................................................................................
364-7
VIO dc-dc Application Schematic
..............................................................................................
374-8
Timing Before Sequence Start
.................................................................................................
504-9
Timings
–Power On in OMAP3 Mode
..........................................................................................
514-10
Timings
—Power On in Slave_C021 Mode
....................................................................................
524-11
Power-Off Sequence in Master Modes
.......................................................................................
536-1
Audio/Voice Module Block Diagram
...........................................................................................
556-2
Predriver for External Class D
..................................................................................................
576-3
Vibrator H-Bridge
.................................................................................................................
586-4
Carkit Output Downlink Path Characteristics
.................................................................................
586-5
Digital Audio Filter Downlink Path Characteristics
...........................................................................
596-6
Analog Microphone Pseudodifferential
........................................................................................
626-7
Analog Microphone Differential
.................................................................................................
636-8
Silicon Microphone
...............................................................................................................
646-9
Audio Auxiliary Input
.............................................................................................................
656-10
Uplink Amplifier
...................................................................................................................
656-11
Carkit Input Uplink Path Characteristics
......................................................................................
676-12
Digital Audio Filter Uplink Path Characteristics
..............................................................................
687-1
USB 2.0 PHY Block Diagram
...................................................................................................
697-2
USB System Application Schematic
...........................................................................................
707-3
HS-USB Interface
—Transmit and Receive Modes (ULPI 8-bit)
............................................................
717-4
USB-CEA Carkit UART Data Flow
.............................................................................................
727-5
USB-CEA Carkit UART Timings
................................................................................................
738-1
Conversion Sequence General Timing Diagram
.............................................................................
809-1
LED Driver Block Diagram
......................................................................................................
8110-1
Keyboard Connection
............................................................................................................
8211-1
Clock Overview
...................................................................................................................
8311-2
HFCLKIN Clock Distribution
....................................................................................................
8411-3
Example of Wired-OR Clock Request
.........................................................................................
8511-4
HFCLKIN Squared Input Clock
.................................................................................................
8611-5
32-kHz Oscillator Block Diagram In Master Mode With Crystal
............................................................
8711-6
32-kHz Crystal Input
.............................................................................................................
8811-7
32-kHz Oscillator Block Diagram Without Crystal Option 1
.................................................................
8911-8
32-kHz Oscillator Block Diagram Without Crystal Option 2
.................................................................
9011-9
32-kHz Oscillator in Bypass Mode Block Diagram Without Crystal Option 3
............................................
9011-10
32-kHz Square- or Sine-Wave Input Clock
...................................................................................
9111-11
32.768-kHz Clock Output Block Diagram
.....................................................................................
9111-12
32KCLKOUT Output Clock
......................................................................................................
9211-13
HFCLKOUT Output Clock
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93Copyright
2008–2011, Texas Instruments Incorporated
List of Figures
5