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参数资料
| 型号： | TRC101 |
| 厂商： | RFM |
| 文件页数： | 28/42页 |
| 文件大小： | 0K |
| 描述： | RFIC TRANCEIVER MULTI-CHANNEL FS |
| 产品变化通告： | RFIC Obsolescence 15/Sept/2009 |
| 标准包装： | 1 |
| 系列： | TRC |
| 频率： | 300MHz ~ 1GHz |
| 数据传输率 - 最大： | 256kbps |
| 调制或协议： | FSK |
| 应用： | 通用 |
| 功率 - 输出： | 8dBm |
| 灵敏度： | -105dBm |
| 电源电压： | 2.2 V ~ 5.4 V |
| 电流 - 接收： | 17mA |
| 电流 - 传输： | 28mA |
| 数据接口： | PCB，表面贴装 |
| 天线连接器： | PCB，表面贴装 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | 583-1093-6 |
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Power Management Register [POR=8208h]
Bit
15
1
Bit
14
0
Bit
13
0
Bit
12
0
Bit
11
0
Bit
10
0
Bit
9
1
Bit
8
0
Bit
7
RXEN
Bit
6
BBEN
Bit
5
TXEN
Bit
4
SYNEN
Bit
3
OSCEN
Bit
2
LBDEN
Bit
1
WKUPEN
Bit
0
CLKDIS
The Power Management Register enables/disables the following:
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Receiver chain
Transmit Chain
Baseband Circuit
PLL
Power Amplifier
Synthesizer
Crystal Oscillator
Low battery Detect Circuit
Wake-up Timer
Clock Output
Bit [15..8] – Command Code : These bits are the command code that is sent serially to the processor
that identifies the bits to be written to the Power Management register.
Bit [7] – Receiver Chain Enable : This bit enables the entire receiver chain when set. The receiver chain
comprises the baseband circuit, synthesizer, and crystal oscillator.
Bit [6] – Baseband Circuit Enable : This bit enables the baseband circuit when set. The baseband
circuit, synthesizer, and oscillator work together to demodulate and recover the data transmitted so the
synthesizer (Bit 4) and oscillator (Bit 3) must be enabled at the same time as the baseband circuits in
order to receive data. This bit can be disabled to conserve current consumption.
Bit [5] – Transmit Chain Enable : This bit enables the entire transmit chain when set. The transmit chain
consists of the power amplifier, synthesizer, oscillator, and transmit register. When the transmit chain and
transmit register is enabled, any data in the transmit register is shifted out and transmission is started.
Bit [4] – Synthesizer Enable : This bit enables the synthesizer when set. The synthesizer contains the
PLL, oscillator, and VCO for controlling the channel frequency. This must be enabled when either the
transmitter is enabled or the receiver is enabled. The oscillator also must be enabled to provide the
reference frequency for the PLL. On power-up the synthesizer performs a calibration automatically. If
there are significant changes in voltage or temperature, recalibration can be performed by simply
disabling the synthesizer and re-enabling it.
Bit [3] – Crystal Oscillator : This bit enables the oscillator circuit when set. The oscillator provides the
reference signal for the synthesizer when setting the transmit or receive frequency of use.
Bit [2] – Low Battery Detector : This bit enables the battery voltage detect circuit when set. The battery
detector can be programmed to 32 different threshold levels. See Battery Detect Threshold and Clock
Output Register section for programming.
Bit [1] – Wake-up Timer Enable : This bit enables the wake-up timer when set. See Wake-up Timer
Period Register section for programming the wake-up timer interval value.
Bit [0] – Clock Output Disable : This bit disables the oscillator clock output when set. On chip reset or
power up, clock output is enabled so that a processor may begin execution of any special setup
sequences as required by the designer. See Battery Detect Threshold and Clock Output Register section
for programming details.
NOTE: If this bit is cleared, the oscillator will continue to run even though the Crystal Oscillator Enable bit
(3) is cleared and the device will not fully enter sleep mode.
www.RFM.com
Email: info@rfm.com
Page 28 of 42
?by RF Monolithics, Inc.
TRC101 - 4/8/08
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