参数资料
型号: TRC101
厂商: RFM
文件页数: 30/42页
文件大小: 0K
描述: RFIC TRANCEIVER MULTI-CHANNEL FS
产品变化通告: RFIC Obsolescence 15/Sept/2009
标准包装: 1
系列: TRC
频率: 300MHz ~ 1GHz
数据传输率 - 最大: 256kbps
调制或协议: FSK
应用: 通用
功率 - 输出: 8dBm
灵敏度: -105dBm
电源电压: 2.2 V ~ 5.4 V
电流 - 接收: 17mA
电流 - 传输: 28mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 标准包装
其它名称: 583-1093-6
Duty Cycle Set Register [POR=C80Eh]
Bit
15
1
Bit
14
1
Bit
13
0
Bit
12
0
Bit
11
1
Bit
10
0
Bit
9
0
Bit
8
0
Bit
7
DC6
Bit
6
DC5
Bit
5
DC4
Bit
4
DC3
Bit
3
DC2
Bit
2
DC1
Bit
1
DC0
Bit
0
DCEN
The duty cycle register may be used in conjunction with the wake-up timer to reduce the average current
consumption of the receiver. The duty cycle register may be set up so that when the wake-up timer
brings the chip out of sleep mode the receiver is turned on for a short time to sample if a signal is present
and then goes back into sleep and the process starts over.
The duty cycle uses the Multiplier value of the wake-up timer in part for its calculation. To calculate the
duty cycle use:
Duty Cycle(%) = ((D[6..0] * 2 )+ 1)/M * 100
where M is M[7..0] of the Wake-up Timer Period Register .
Bit [15..8] – Command Code : These bits are the command code that is sent serially to the processor
that identifies the bits to be written to the Duty Cycle Set Register .
Bit [7..1] – Duty Cycle Multiplier : These bits are the decimal value used to calculate the Duty Cycle or
“On time” of the Receiver after the wake-up timer has brought the TRC101 out of sleep mode.
Bit [0] – Duty Cycle Mode Enable : This bit enables the duty cycle mode when set.
NOTE: The receiver must be disabled (RXEN = ‘0’ in Power Management Register ) and the wake-up
timer must be enabled (WKUPEN = ‘1’ in Power Management Register ) for operation in this mode.
www.RFM.com
Email: info@rfm.com
Page 30 of 42
?by RF Monolithics, Inc.
TRC101 - 4/8/08
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