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| 型号： | TSS463A-TERZ |
| 厂商： | Atmel Corp. |
| 英文描述： | VAN Data Link Controller with Serial Interface |
| 中文描述： | 凡数据与串行接口链路控制器 |
| 文件页数： | 30/60页 |
| 文件大小： | 816K |
| 代理商： | TSS463A-TERZ |
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30
TSS463-AA
4205B–AUTO–12/04
Ma, Mb: Operating Mode
Command Bits
Table 7.
Diagnosis System Command Bits
ETIP: Enable Transmission In
Progress
The Transmission In Progress (TIP) tells the diagnosis system to enable transmission
diagnosis.
One
: Enable TIP generation
Zero
: Disable TIP generation.
ESDC: Enable System
Diagnosis Clock
The Synchronous Diagnosis Clock (SDC) controls the cycle time of the synchronous
diagnosis.
One
: Enable SDC divider.
Zero
: Disable SDC divider.
Command Register (0x03)
Write only register.
Reserved: Bit 1, 2 these bits must not be set by the user; a zero must always be
written to these bit.
If the circuit is operating at low bitrates there might be a considerable delay between
the writing of this register and the performing of the actual command (worst case 6
timeslots). The user is therefore recommended to verify, by reading the Line Status
Register (0x04), that the commands have been performed.
GRES: General Reset
The Reset circuit command bit performs, if set, exactly as if the external reset pin was
asserted. This command bit has its own auto-reset circuitry.
One
: Reset active
Zero
: Reset inactive
SLEEP: Sleep Command
(See Section “Sleep Command”, page 52).If the user sets the Sleep bit, the circuit will
enter sleep mode. When the circuit is in sleep mode, all non-user registers are setup to
minimize power consumption. Read/write accesses to the TSS463AA via the SPI/SCI
interface are impossible, the oscillator is stopped.
To exit from this mode the user must apply either an hardware reset (external RESET
pin) or an asynchronous software reset (via the SPI/SCI interface).
One:
Sleep active
Zero:
Sleep inactive
Ma
Mb
0
0
Forces the Communication on RxD0 (differential)
0
1
Forces the Communication on RxD2 (DATA)
1
0
Forces the Communication on RxD1 (DATA)
1
1
Automatic selection
7
6
5
4
3
2
1
0
GRES
SLEEP
IDLE
ACTI
REAR
0
0
MSDC
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相关代理商/技术参数 |
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|---|---|
| TSS463B | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Serial VAN Data Link Controller |
| TSS463B_03 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Serial VAN Data Link Controller |
| TSS463B_04 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:VAN Data Link Controller with Serial Interface |
| TSS463B-TERA | 制造商:Temic 功能描述:LAN Node Controller, 16 Pin, SOP |
| TSS463B-TERA-9 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:VAN Data Link Controller with Serial Interface |
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