
CHAPTER 19 RESET FUNCTION
User’s Manual U19678EJ1V1UD
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Table 19-2. Hardware Statuses After Reset Acknowledgment (1/4)
Hardware
After Reset
Acknowledgment
Note 1
Program counter (PC)
The contents of the
reset vector table
(0000H, 0001H) are set.
Stack pointer (SP)
Undefined
Program status word (PSW)
06H
Data memory
Undefined
Note 2
RAM
General-purpose registers
Undefined
Note 2
Processor mode control register (PMC)
00H
Port registers (P0 to P8, P12, P14, P15) (output latches)
00H
Port mode registers
PM0 to PM8, PM12, PM15
FFH
PM14
FEH
Port input mode registers (PIM3, PIM7, PIM8)
00H
Port output mode registers (POM3, POM7)
00H
Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, PU14)
00H
Clock operation mode control register (CMC)
00H
Clock operation status control register (CSC)
C0H
System clock control register (CKC)
09H
40 MHz internal high-speed oscillation control register (DSCCTL)
00H
Oscillation stabilization time counter status register (OSTC)
00H
Oscillation stabilization time select register (OSTS)
07H
Noise filter enable registers 0, 1, 2 (NFEN0, NFEN1, NFEN2)
00H
Peripheral enable registers 0, 1, 2 (PER0, PER1, PER2)
00H
Operation speed mode control register (OSMC)
00H
Timer data registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TDR00,
TDR01, TDR02, TDR03, TDR04, TDR05, TDR06, TDR07, TDR08, TDR09,
TDR10, TDR11)
0000H
Timer mode registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TMR00,
TMR01, TMR02, TMR03, TMR04, TMR05, TMR06, TMR07, TMR08, TMR09,
TMR10, TMR11)
0000H
Timer status registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TSR00,
TSR01, TSR02, TSR03, TSR04, TSR05, TSR06, TSR07, TSR08, TSR09,
TSR10, TSR11)
0000H
Timer input select register 0 (TIS0)
00H
Timer counter registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TCR00,
TCR01, TCR02, TCR03, TCR04, TCR05, TCR06, TCR07, TCR08, TCR09,
TCR10, TCR11)
FFFFH
Timer channel enable status register 0 (TE0)
0000H
Timer channel start register 0 (TS0)
0000H
Timer channel stop register 0 (TT0)
0000H
Timer clock select 0 (TPS0)
0000H
Timer output register 0 (TO0)
0000H
Timer output enable register 0 (TOE0)
0000H
Timer array unit
(TAUS)
Timer output level register 0 (TOL0)
0000H
Notes 1.
During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
2.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
Remark
The special function register (SFR) mounted depend on the product. See 3.2.4 Special function registers
(SFRs) and 3.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers).