- 您现在的位置：买卖IC网 > PDF目录16113 > VTERB-BLK-E2-U4 (Lattice Semiconductor Corporation)IP CORE VITERBI DECODER EC/ECP PDF资料下载
参数资料
| 型号： | VTERB-BLK-E2-U4 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 13/34页 |
| 文件大小： | 0K |
| 描述： | IP CORE VITERBI DECODER EC/ECP |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | VTERBBLKE2U4 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页
Lattice Semiconductor
Table 2-3. Top Level I/O Interface (Continued)
Functional Description
pp0
pp1
Port
Bits
1-12
1-12
I/O
I
I
Description
Puncture pattern 0 of the convolutional code for next block. This port is available
only in dynamic puncturing mode.
Puncture pattern 1 of the convolutional code for next block. This port is available
only in dynamic puncturing mode.
Puncture rate and puncture pattern set signal. The new input rate, output rate
ppset
1
I
and puncture patterns are set when ppset goes high. This port is available only
in dynamic puncturing mode.
dout
outvalid
obvalid
ber
1
1
1
16
O
O
O
O
Output decoded data.
Output valid signal. This indicates the output on dout is a valid decoded value.
Output block valid signal. This signal remains high for the entire duration of the
output block. This signal is present only for punctured and block decoding.
Bit-error rate output. This port is available for continuous decoding only.
Identifies that a new Bit Error Rate (BER) value is available at the ber output
bervalid
1
O
port. This signal goes high once every B clock cycles, where B=2^( BER
Period ), is the duration over which BER is computed. This port is available for
continuous decoding only.
“Ready for input block” signal.
1. This port is not available for non-punctured decoders.
2. For fixed puncturing, this signal goes high every L*(2^c) cycles periodically
counting from ibstart for each input block, where L is the traceback length
and c is the hybrid index. After applying an input block (after ibend going
rfib
1
O
active), the user has to wait for the next rfib pulse before he can start giv-
ing the next input block. In fixed puncturing mode, this port is available only
for zero flushing block decoding and Number of Tracebacks is 2.
3. For dynamic puncturing, this port is always available. It goes low one cycle
after an input block starts (after ibstart signal going high). It goes high a
few cycles after an input block ends (after ibend going low).
IPUG32_02.7, June 2010
13
Block Viterbi Decoder User’s Guide
相关PDF资料 |
PDF描述 |
|---|---|
| 50ZLJ100MT78X11.5 | CAP ALUM 100UF 50V 20% RADIAL |
| M3BRK-3406R | IDC CABLE - MSR34K/MC34M/MPR34K |
| M3URK-2620K | IDC CABLE - MKS26K/MC26F/MPR26K |
| 10ZLH1000M8X16 | CAP ALUM 1000UF 10V 20% RADIAL |
| M3UYK-2620K | IDC CABLE - MKS26K/MC26F/MPD26K |
相关代理商/技术参数 |
参数描述 |
|---|---|
| VTERB-BLK-E3-U4 | 功能描述:开发软件 Block Viterbi Decoder RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| VTERB-BLK-E3-UT4 | 功能描述:开发软件 BLOCK VITERBI DECODER (ECP3) RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| VTERB-BLK-P2-U4 | 功能描述:编码器、解码器、复用器和解复用器 Block Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| VTERB-BLK-PM-U4 | 功能描述:开发软件 Blck Viterbi Decodr User Config RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| VTERB-BLK-SC-U4 | 功能描述:编码器、解码器、复用器和解复用器 Block Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。