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| 型号： | W19B320BTT7H |
| 厂商： | Winbond Electronics |
| 文件页数： | 6/51页 |
| 文件大小： | 0K |
| 描述： | IC FLASH 32MBIT 70NS 48TSOP |
| 标准包装： | 96 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 32M（4M x 8，2M x 16） |
| 速度： | 70ns |
| 接口： | 并联 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -20°C ~ 85°C |
| 封装/外壳： | 48-TFSOP（0.724"，18.40mm 宽） |
| 供应商设备封装： | 48-TSOP |
| 包装： | 托盘 |
| 其它名称： | W19B320BTT-H W19B320BTT-H-ND |
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W19B320BT/B DATASHEET
6. FUNCTIONAL DESCRIPTION
6.1
6.1.1
Device Bus Operation
Word/Byte Configuration
The #BYTE pin controls the device data I/O pins operate whether in the byte or word configuration.
When the #BYTE pin is ‘1’, the device is in word configuration; DQ0 -DQ15 are active and controlled by
#CE and #OE.
When the #BYTE pin is ‘0’, the device is in byte configuration, and only data I/O pins DQ0-DQ7 are active
and controlled by #CE and #OE. The data I/O pins DQ8-DQ14 are tri-stated, and the DQ15 pin is used
as an input for the LSB (A-1) address function.
6.1.2
Reading Array Data
To read array data from the outputs, the #CE and #OE pins must be set to V IL . #CE is the power control
and used to select the device. #OE is the output control and gates array data to the output pins. #WE
should stay at V IH . The #BYTE pin determines the device outputs array data whether in words or bytes.
The internal state machine is set for reading array data when device power-up, or after hardware reset.
This ensures that no excess modification of the memory content occurs during the power transition. In
this mode there is no command necessary to obtain array data. Standard microprocessor read cycles
that assert valid addresses on the device address inputs produce valid data on the device data outputs.
Each bank remains enabled for read access until the command register contents are changed.
6.1.3
Writing Commands/Command Sequences
In writhing a command or command sequence (which includes programming data to the device and
erasing sectors of memory), the system must drive #WE and #CE to V IL , and #OE to V IH .
For program operations, the #BYTE pin determines the device accepts program data whether in bytes
or in words. Refer to “Word/Byte Configuration” for more information.
The Unlock Bypass mode of device is to facilitate a faster programming. When a bank enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte. Please refer to
"Word/Byte Configuration” section for details on programming data to the device using both standard
and Unlock Bypass command sequences.
The erase operation can erase a sector, multiple sectors, even the entire device. The “sector address”
is the address bits required to solely select a sector.
Accelerated Program Operation
The device provides accelerated program operations through the ACC function. This is one of two
functions provided by the #WP/ACC pin. This function is primarily intended to allow a faster
manufacturing throughput in the factory.
If #WP/ACC pin is set at V HH , the device automatically enters into the Unlock Bypass mode. Then the
device will temporarily unprotect any protected sectors, and uses the higher voltage on this pin to
reduce the time required for program operations. The system would use a two-cycle program command
sequence required by the Unlock Bypass mode. When V HH is removed from the #WP/ACC pin, the
device is back to a normal operation.
Publication Release Date:Dec, 22, 2008
-6-
Revisionv A5
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