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参数资料
| 型号： | W19B320SBB9B |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PBGA48 |
| 封装： | TFBGA-48 |
| 文件页数： | 34/52页 |
| 文件大小： | 1869K |
| 代理商： | W19B320SBB9B |
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W19B(L)320ST/B
1. GENERAL DESCRIPTION
The W19B(L)320ST/B is a 32Mbit, 2.7
3.6(3.03.6) volt CMOS flash memory organized as 4M × 8 or
2M
× 16 bits. For flexible erase capability, the 32 Mbits of data are divided into eight 8KB, and sixty-
three 64KB sectors. The word-wide (
×16) data appears on DQ15DQ0, and byte-wide (×8) data
appears on DQ7
DQ0. The device can be programmed and erased in-system with a standard
2.7
3.6V(3.03.6V) power supply. A 12-volt VPP is not required. The unique cell architecture of the
W19B320ST/B results in fast program/erase operations with extremely low current consumption
(compared to other comparable 3-volt flash memory products). The device can also be programmed
and erased by using standard EPROM programmers.
2. FEATURES
Performance
2.7~3.6-volt write (program and erase)
operations (W19B320S)
TTL compatible I/O
Manufactured on WinStack 0.18m process
technology
3.0~3.6-volt write (program and erase)
operations (W19L320S)
Available packages: 48-pin TSOP and 48-ball
TFBGA (8x11mm)
Fast write operation
Software Features
Sector erase time: 0.7 Sec (typ.)
Chip erase time: 49 Sec (typ.)
Compatible with common Flash Memory
Interface (CFI) specification
Byte programming time: 5 S (typ.)
Flash device parameters stored directly on
the device
Read access time: 90 nS
Typical program/erase cycles:
Allows software driver to identify and use a
variety of different current and future Flash
products
100K
Twenty-year data retention
Erase Suspend/Erase Resume
Ultra low power consumption
Suspends erase operations to allow
programming in same bank
Active current (Read): 10 mA (typ.) at 5 MHz
Standby current: 0.2 A (typ.)
End of program detection
Architecture
Software method: Toggle bit/Data polling
Sector erase architecture
Unlock Bypass Program command
Eight 8KB, and sixty-three 64KB sectors
Reduces overall programming time when
issuing multiple program command
sequences
Top or bottom boot block configurations
available
Supports full chip erase
Hardware Features
Security Sector Size: 256 Bytes
Ready/#Busy output (RY/#BY)
The Security Sector is an OTP; once the sector
is programmed, it cannot be erased
Detect program or erase cycle completion
Hardware reset pin (#RESET)
JEDEC standard byte-wide and word-wide
pinouts
Reset the internal state machine to the read
mode
- 4 -
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