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参数资料
| 型号： | W25Q32DWZPIP |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 256K X 16 SPI BUS SERIAL EEPROM, 7.5 ns, PDSO8 |
| 封装： | 6 X 5 MM, GREEN, WSON-8 |
| 文件页数： | 31/82页 |
| 文件大小： | 1155K |
| 代理商： | W25Q32DWZPIP |
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W25Q32DW
Publication Release Date: January 18, 2011
- 37 -
Preliminary - Revision C
10.2.17 Word Read Quad I/O (E7h)
The Word Read Quad I/O (E7h) instruction is similar to the Fast Read Quad I/O (EBh) instruction except
that the lowest Address bit (A0) must equal 0 and only two Dummy clock are required prior to the data
output. The Quad I/O dramatically reduces instruction overhead allowing faster random access for code
execution (XIP) directly from the Quad SPI. The Quad Enable bit (QE) of Status Register-2 must be set to
enable the Word Read Quad I/O Instruction.
Word Read Quad I/O with “Continuous Read Mode”
The Word Read Quad I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in Figure 16a. The
upper nibble of the (M7-4) controls the length of the next Fast Read Quad I/O instruction through the
inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care
(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.
If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Fast Read Quad I/O instruction (after /CS
is raised and then lowered) does not require the E7h instruction code, as shown in Figure 16b. This
reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered
after /CS is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next
instruction (after /CS is raised and then lowered) requires the first byte instruction code, thus returning to
normal operation. It is recommended to input FFh on IO0 for the next instruction (8 clocks), to ensure M4
= 1 and return the device to normal operation.
Figure 16a. Word Read Quad I/O Instruction (Initial instruction or previous M5-4
≠ 10, SPI Mode only)
M7-0
/CS
CLK
Mode 0
Mode 3
0
1
IO
0
IO
1
IO
2
IO
3
2
3
4
5
20
16
12
8
21
17
22
18
23
19
13
9
14
10
15
11
A23-16
6
7
8
9
4
0
5
1
6
2
7
3
A15-8
A7-0
Byte 1
Byte 2
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
10
11
12
13
14
4
5
6
7
IOs switch from
Input to Output
Byte 3
15
16
17
18
19
20
21
Dummy
Instruction (E7h)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q32FVSFIG | 功能描述:IC FLASH SPI 32MBIT 16SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| W25Q32FVSSIG | 制造商:Winbond Electronics Corp 功能描述:Flash Serial-SPI 3V/3.3V 32Mbit 4M x 8bit 8.5ns 8-Pin SOIC 制造商:Winbond Electronics Corp 功能描述:32MB F VERSIOB SPI FLASH 制造商:Winbond Electronics Corp 功能描述:IC FLASH 32MBIT 104MHZ 8SOIC |
| W25Q32FVSSIG TR | 制造商:Winbond Electronics Corp 功能描述:IC FLASH 32MBIT 104MHZ 8SOIC |
| W25Q32FVSSIQ | 制造商:Winbond Electronics Corp 功能描述: |
| W25Q32FVZPIG | 功能描述:IC FLASH SPI 32MBIT 8WSON RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:2,500 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（单线） 电源电压:1.8 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-MSOP 包装:带卷 (TR) |
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