参数资料
型号: W6692ACD
厂商: WINBOND ELECTRONICS CORP
元件分类: 数字传输电路
英文描述: DATACOM, ISDN CONTROLLER, PQFP100
封装: LQFP-100
文件页数: 53/98页
文件大小: 584K
代理商: W6692ACD
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-57 -
8.1.20 Timer 2
TIMR2
Write
Address 4CH/13H
Value after reset : 00H
7
6
5
4
3
2
1
0
TMD
TIDLE
TCN5
TCN4
TCN3
TCN2
TCN1
TCN0
TMD
Timer 2 Mode
0: One shot count down mode. The timer starts when it is written a non-zero count value and stops when it reaches zero.
1: Cyclic timer mode. The timer starts when it is written a non-zero count value and counts cyclically (periodically) with the
count value.
In both cases, a maskable interrupt TIN2 is generated every time the timer reaches zero. When timer starts, pin TOUT2
changes to HIGH and toggles every half count time. Therefore, the period of TOUT2 equals count value.
In both cases, timer counts with the new value if it is written again before expiration.
The timer is stopped when it expires (TMD=0), or by writting zero count value (TMD=0 or 1).
TIDLE
TOUT2 Idle
This bit defines value of TOUT2 pin when timer if off.
TCN5-0
Timer 2 Count Value
0: Timer is off.
1-63: Timer count value in unit of ms.
8.1.21 Layer 1_Ready Code
L1_RC
Read/Write
Address 50H/14H
Value after reset: 0CH
7
6
5
4
3
2
1
0
RC3
RC2
RC1
RC0
RC3-0
Ready Code
When GCI bus is being enabled, these four programmable bits are allowed to program different Layer 1_Ready Code (AI:
Activation Indication) by user. For example: Siemens PEB2091: AI=1100, Motorola MC145572: AI=1100.
8.1.22 Control Register
CTL
Read/Write
Address 54H/15H
Value after reset : 00H
7
6
5
4
3
2
1
0
SRST
0
OPS1
OPS0
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