参数资料
型号: W947D6HBHX6E
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 8M X 16 DDR DRAM, 5 ns, PBGA60
封装: 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-60
文件页数: 11/60页
文件大小: 1160K
代理商: W947D6HBHX6E
W947D6HB / W947D2HB
128Mb Mobile LPDDR
Publication Release Date:Jun,17, 2011
- 19 -
Revision A01-003
6.8 Partial Array Self Refresh
With partial array self refresh (PASR), the self refresh may be restricted to a variable portion of the total array. The
whole array (default), 1/2 array, or 1/4 array could be selected. Data outside the defined area will be lost. Address
bits A0 to A2 are used to set PASR.
6.9 Automatic Temperature Compensated Self Refresh
The device has an Automatic Temperature Compensated Self Refresh feature. It automatically adjusts the refresh
rate based on the device temperature without any register update needed. To maintain backward compatibility, this
device
which have Automatic TCSR, ignore (dont care) the inputs to address bits A3 and A4 during EMRS
programming.
6.10 Output Drive Strength
The drive strength could be set to full, half or three-quarter strength via address bits A5 and A6. The half drive
strength option is intended for lighter loads or point-to-point environments.
6.11 Commands
All commands (address and control signals) are registered on the positive edge of clock (crossing of CK going high
and CK going low).
6.11.1 Basic Timing Parameters for Commands
CK
Input
Valid
tCL
tCH
tCK
tIS
tIH
: Don't Care
NOTE: Input=A0 – An, BA0, BA1, CKE, CS, RAS, CAS, WE;
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