参数资料
型号: W948D2FBJX5E
厂商: Winbond Electronics
文件页数: 26/60页
文件大小: 0K
描述: IC LPDDR SDRAM 256MBIT 90VFBGA
标准包装: 240
格式 - 存储器: RAM
存储器类型: 移动 LPDDR SDRAM
存储容量: 256M(8Mx32)
速度: 200MHz
接口: 并联
电源电压: 1.7 V ~ 1.95 V
工作温度: -25°C ~ 85°C
封装/外壳: 90-TFBGA
供应商设备封装: 90-VFBGA(8x13)
包装: 托盘
W948D6FB / W948D2FB
256Mb Mobile LPDDR
7.3.2 Mode Register Set Command Timing
CK
CK
Command
MRS
NOP
Valid
t MRD
Address
Code
Valid
: Don't Care
NOTE:Code=Mode Register / Extended Mode Register selection
(BA0,BA1)and op-code (A0-An)
7.4. Active
Before any READ or WRITE commands can be issued to a bank in the LPDDR SDRAM, a row in that bank must be
opened. This is accomplished by the ACTIVE command: BA0 and BA1 select the bank, and the address inputs
select the row to be activated. More than one bank can be active at any time.
Once a row is open, a READ or WRITE command could be issued to that row, subject to the t RCD specification.
A subsequent ACTIVE command to another row in the same bank can only be issued after the previous row has
been closed. The minimum time interval between two successive ACTIVE commands on the same bank is defined
by t RC .
7.4.1 Active Command
CK
CK
CKE
CS
RAS
CAS
WE
A0-An
BA0,BA1
(High)
RA
BA
= Don't Care
BA=BANK Address, RA=Row
Address
Publication Release Date : Oct, 15, 2012
- 26 -
Revision : A01-004
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