- 您现在的位置：买卖IC网 > PDF目录245698 > W9864G6IH-6A (WINBOND ELECTRONICS CORP) 4M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 PDF资料下载
参数资料
| 型号： | W9864G6IH-6A |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 4M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 |
| 封装： | 0.400 INCH, ROHS COMPLIANT, TSOP2-54 |
| 文件页数： | 2/44页 |
| 文件大小： | 666K |
| 代理商： | W9864G6IH-6A |
第1页当前第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页
W9864G6IH
Publication Release Date: Mar. 22, 2010
- 10 -
Revision A11
7.14 Auto-precharge Command
If A10 is set to high when the Read or Write Command is issued, then the auto-precharge function is
entered. During auto-precharge, a Read Command will execute as normal with the exception that the
active bank will begin to precharge automatically before all burst read cycles have been completed.
Regardless of burst length, it will begin a certain number of clocks prior to the end of the scheduled
burst cycle. The number of clocks is determined by CAS Latency.
A Read or Write Command with auto-precharge cannot be interrupted before the entire burst
operation is completed for the same bank. Therefore, use of a Read, Write, or Precharge Command is
prohibited during a read or write cycle with auto-precharge. Once the precharge operation has started,
the bank cannot be reactivated until the Precharge time (tRP) has been satisfied. Issue of Auto-
Precharge command is illegal if the burst is set to full page length. If A10 is high when a Write
Command is issued, the Write with Auto-Precharge function is initiated. The SDRAM automatically
enters the precharge operation two clocks delay from the last burst write cycle. This delay is referred
to as write tWR. The bank undergoing auto-precharge cannot be reactivated until tWR and tRP are
satisfied. This is referred to as tDAL, Data-in to Active delay (tDAL = tWR + tRP). When using the Auto-
precharge Command, the interval between the Bank Activate Command and the beginning of the
internal precharge operation must satisfy tRAS (min).
7.15 Precharge Command
The Precharge Command is used to precharge or close a bank that has been activated. The
Precharge Command is entered when CS , RAS and WE are low and CAS is high at the rising
edge of the clock. The Precharge Command can be used to precharge each bank separately or all
banks simultaneously. Three address bits, A10, BS0, and BS1 are used to define which bank(s) is to
be precharged when the command is issued. After the Precharge Command is issued, the precharged
bank must be reactivated before a new read or write access can be executed. The delay between the
Precharge Command and the Activate Command must be greater than or equal to the Precharge time
(tRP).
7.16 Self Refresh Command
The Self Refresh Command is defined by having CS , RAS , CAS and CKE held low with WE
high at the rising edge of the clock. All banks must be idle prior to issuing the Self Refresh Command.
Once the command is registered, CKE must be held low to keep the device in Self Refresh mode.
When the SDRAM has entered Self Refresh mode all of the external control signals, except CKE, are
disabled. The clock is internally disabled during Self Refresh Operation to save power. The device will
exit Self Refresh operation after CKE is returned high. Any subsequent commands can be issued after
tXSR from the end of Self Refresh Command.
If, during normal operation, AUTO REFRESH cycles are issued in bursts (as opposed to being evenly
distributed), a burst of 4,096 AUTO REFRESH cycles should be completed just prior to entering and
just after exiting the self refresh mode.
相关PDF资料 |
PDF描述 |
|---|---|
| WS128K32V-20HM | 512K X 8 MULTI DEVICE SRAM MODULE, 20 ns, HIP66 |
| WS128K32V-25HS | 512K X 8 MULTI DEVICE SRAM MODULE, 25 ns, HIP66 |
| WS128K32V-25G4Q | 512K X 8 MULTI DEVICE SRAM MODULE, 25 ns, QMA68 |
| WMD4M4-100FPM | 4M X 4 FAST PAGE DRAM, 100 ns, CDFP24 |
| WMF256K8-120DEI5 | 256K X 8 FLASH 5V PROM, 120 ns, CDSO32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W9864G6IH-6I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V |
| W9864G6IH-7 | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M 】 4BANKS 】 16BITS SDRAM |
| W9864G6IH-7S | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M 】 4BANKS 】 16BITS SDRAM |
| W9864G6JB-6 | 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 64MBIT 166MHZ 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 64MBIT 166MHZ 60VFBGA |
| W9864G6JH | 制造商:WINBOND 制造商全称:Winbond 功能描述:1M ? 4 BANKS ? 16 BITS SDRAM |
发布紧急采购，3分钟左右您将得到回复。