参数资料
型号: WED9LAPC2C16V8BC
厂商: WHITE ELECTRONIC DESIGNS CORP
元件分类: 存储器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA192
封装: 21 X 21 MM, BGA-192
文件页数: 16/24页
文件大小: 933K
代理商: WED9LAPC2C16V8BC
23
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED9LAPC2C16V8BC
July, 2000
Rev. 0
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Test Mode
CAS Latency
Burst Type
Burst Length
A10
A7
Type
A6
A5
A4
Latency
A3
Type
A2
A1
A0
BT = 0
BT = 1
0
Mode Register Set
0
Reserved 0 Sequential
0
1
0
1
Reserved
0
1
Reserved 1
Interleave
0
1
2
1
0
Reserved
0
1
0
2
0
1
0
4
1
Reserved
0
1
3
0
1
8
Write Burst Length
1
0
Reserved
1
0
Reserved Reserved
A9
Length
1
0
1
Reserved
1
0
1
Reserved Reserved
0
Burst
1
0
Reserved
1
0
Reserved Reserved
1
Single Bit
1
Reserved
1
Full Page Reserved
MODE REGISTER FIELD TABLE TO PROGRAM MODES
REGISTER PROGRAMMED WITH MRS
Note:
1.
If A8 is high during MRS cycle, “Burst Read Single Bit Write” function will be
enabled.
2.
RFU (Reserved for future use) shuld stay “0” during MRS cycle.
SDRAMs must be powered up and initialized in a
predened manner to prevent undened operations.
1.
Apply power and start clock. Must maintain
CKE= “H”,DQM = “H” and the other pins are
NOP condition at the inputs.
2.
Maintain stable power, stable clock and NOP
input condition for a minimum of 200s.
3.
Issue precharge commandes for all banks of
the devices.
4.
Issue 2 or more auto-refresh commands.
5.
Issue a mode register set command to initialize
the mode register.
cf.)
Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
POWER UP SEQUENCE
Full Page Length: x32 (256)
Address BA0
A9/AP
A8
A10
A7
A6
A5
A4
A3
A2
A1
A2
Function RFU
RFU
W.B.L.
TM
CAS Latency
BT
Burst Length
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