参数资料
型号: WJLXT907ALCA4
厂商: CORTINA SYSTEMS INC
元件分类: 网络接口
英文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封装: ROHS COMPLIANT, LQFP-64
文件页数: 26/48页
文件大小: 621K
代理商: WJLXT907ALCA4
Intel
LXT901A/907A Universal 3.3 V Ethernet Transceiver
32
Datasheet
Document Number: 249098
Revision Number: 003
Revision Date: 27-Nov-2005
Table 11. RCLK/End-of-Frame Timing
Parameter
Type
Sym
Mode 1
Mode 2
Mode 3
Mode 4
Units
RCLK after CD off
Min
tRC
51
27
5
BT
Rcv data throughput delay
Max
tRD
400
375
ns
CD turn off delay
2
Max
tCDOFF
500
475
ns
Receive block out after TEN off
Typ1
tIFG
550
BT
RCLK switching delay after CD
off (LXT907A Transceiver only;
Mode 3)
Typ1
tSWE
120(±80)
ns
1. Typical values are at 25°C and are for design aid only, are not guaranteed, and are not subject to
production testing.
2. CD turn-off delay measured from middle of last bit: timing specification is unaffected by the value of the last
bit.
Table 12. Transmit Timing
Parameter
Symbol
Minimum
Typical
1
Maximum
Units
TEN setup from TCLK
tEHCH
22
ns
TXD setup from TCLK
tDSCH
22
ns
TEN hold after TCLK
tCHEL
5–
ns
TXD hold after TCLK
tCHDU
5–
ns
Transmit start-up delay - AUI
tSTUD
–220
450
ns
Transmit start-up delay - TP
tSTUD
–430
450
ns
Transmit through-put delay - AUI
tTPD
––
300
ns
Transmit through-put delay - TP
tTPD
–300
350
ns
1. Typical values are at 25°C and are for design aid only, are not guaranteed, and are not subject to
production testing.
Table 13. Collision, COL/CI Output and Loopback Timing
Parameter
Symbol
Minimum
Typical
1
Maximum
Units
COL turn-on delay
tCOLD
–40
500
ns
COL turn-off delay
tCOLOFF
–420
500
ns
COL (SQE) Delay after TEN off
tSQED
0.65
1.2
1.6
s
COL (SQE) Pulse Duration
tSQEP
500
1000
1500
ns
LBK setup from TEN
tKHEH
10
25
ns
LBK hold after TEN
tKHEL
10
0
ns
1. Typical values are at 25°C and are for design aid only, are not guaranteed, and are not subject to
production testing.
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