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| 型号： | WJLXT907ALCA4 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 4/48页 |
| 文件大小： | 621K |
| 代理商： | WJLXT907ALCA4 |
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Intel
LXT901A/907A Universal 3.3 V Ethernet Transceiver
12
Datasheet
Document Number: 249098
Revision Number: 003
Revision Date: 27-Nov-2005
2.0
Functional Description
The LXT901A/907A Transceiver performs the physical layer signaling (PLS) and Media
Attachment Unit (MAU) functions as defined by the IEEE 802.3 specification. They function as a
PLS-Only device (for use with 10BASE-2 or 10BASE-5 coaxial cable networks) or as an
Integrated PLS/MAU (for use with 10BASE-T twisted-pair networks). In addition to standard 10
Mbps operation, they also support full-duplex 20 Mbps operation.
The LXT901A/907A Transceiver interfaces a back-end controller to either an AUI drop cable or a
twisted-pair (TP) cable. The controller interface includes a transmit and receive clock and NRZ
data channels, as well as mode control logic and signaling. The AUI interface comprises three
circuits: Data Output (DO), Data Input (DI) and Collision (CI). The twisted-pair interface is
comprised of two circuits: Twisted-Pair Input (TPI) and Twisted-Pair Output (TPO). In addition to
the three basic interfaces, the LXT901A/907A Transceiver contains an internal crystal oscillator
and four LED drivers for visual status reporting.
Functions are defined from the back-end controller side of the interface. The Transmit function
refers to data transmitted by the back-end to the AUI cable (PLS-Only mode) or to the twisted-pair
network (Integrated PLS/MAU mode). The Receive function refers to data received by the back-
end from the AUI cable (PLS-Only) or from the twisted-pair network (Integrated PLS/MAU
mode). In the integrated PLS/MAU mode, the LXT901A/907A Transceiver performs all required
MAU functions defined by the IEEE 802.3 10BASE–T specification, such as collision detection,
link integrity testing, signal quality error messaging, jabber control, and loopback. In the PLS-only
mode, the LXT901A/907A Transceiver receives incoming signals from the AUI DI circuit, with ±
18 ns of jitter, and drives the AUI DO circuit.
2.1
Controller Compatibility Modes
The LXT901A/907A Transceiver are compatible with most industry standard controllers, including
devices produced by Motorola*, AMD*, Intel, Fujitsu*, National Semiconductor*, Seeq*, and
Texas Instruments*. Four different control signal timing and polarity schemes (Modes 1 through 4)
are required to achieve this compatibility. Mode select pins (MD0 and MD1) determine controller
compatibility modes as listed in Table 2. Refer to Test Specifications for a complete set of timing
diagrams for each mode.
Table 2.
Controller Compatibility Modes
Controller Mode
Setting
MD1
MD0
Mode 1
For Motorola 68EN360, MPC860, Advanced
Micro Devices AM7990 or compatible
controllers
Low
Mode 2
For Intel 82596 or
compatible controllers
1
Low
High
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