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| 型号： | WJLXT907ALCA4 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 5/48页 |
| 文件大小： | 621K |
| 代理商： | WJLXT907ALCA4 |
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Intel
LXT901A/907A Universal 3.3 V Ethernet Transceiver
Datasheet
13
Document Number: 249098
Revision Number: 003
Revision Date: 27-Nov-2005
2.2
Transmit Function
The LXT901A/907A Transceiver receives NRZ data from the controller at the TXD input, as
shown in
Figure 1, “Intel LXT901A/907A Transceiver Block Diagram” on page 7, and passes it through a
Manchester encoder. The encoded data is then transferred to either the AUI cable (the DO circuit)
or the twisted-pair network (the TPO circuit). The advanced integrated pulse shaping and filtering
network produces the output signal on TPON and TPOP as shown in Figure 3. The TPO output is
pre-distorted and pre-filtered to meet the 10BASE-T jitter template. An internal continuous
resistor-capacitor filter is used to remove any high-frequency clocking noise from the pulse
shaping circuitry. Integrated filters simplify the design work required for FCC compliant EMI
performance. During idle periods, the LXT901A/907A Transceiver transmits link integrity test
pulses on the TPO circuit (if LI is enabled and integrated, PLS/ MAU mode is selected). External
resistors control the termination impedance for the LXT907A Transceiver. External resistors and
the STP pin control termination impedance on the LXT901A Transceiver.
2.2.1
Jabber Control Function
Figure 4 is a state diagram of the LXT901A/907A Transceiver jabber control function. The on-chip
watchdog timer prevents the DTE from locking into a continuous transmit mode. When a
transmission exceeds the time limit, the watchdog timer disables the transmit and loopback
functions, and activates the JAB pin. Once the LXT901A/907A Transceiver is in the jabber state,
the TXD circuit must remain idle for a period of 250 to 750 ms before it exits the jabber state.
Mode 3
For Fujitsu MB86950, MB86960 or
compatible controllers (Seeq 8005)
2
High
Low
Mode 4
For National Semiconductor 8390 or
compatible controllers
(TI TMS380C26)
High
1. Refer to Intel Application Note 51 when designing with Intel
Controllers.
2. SEEQ controllers require inverters on CLK1, LBK, RCLK and
COL.
Table 2.
Controller Compatibility Modes
Controller Mode
Setting
MD1
MD0
Figure 3. TPO Output Waveform
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| WJLXT908LC.A4 | 功能描述:IC 3V 10BASE-T/AUI TXCVR 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| WJLXT908LC.A4-865813 | 制造商:Cortina Systems Inc 功能描述:PHY 1-CH 10Mbps 64-Pin LQFP |
| WJLXT908LC.A4-866864 | 制造商:Cortina Systems Inc 功能描述:UNIVERSAL 10BASE-T TRANSCEIVER WITH 3.3 V SUPPORT |
| WJLXT908LE.A4 | 功能描述:IC 3V 10BASE-T/AUI TXCVR 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| WJLXT908LE.A4-865811 | 制造商:Cortina Systems Inc 功能描述:Ethernet TXRX Single Chip 1-Port 3.3V 10Mbps 64-Pin LQFP |
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