参数资料
型号: X40411S8I-C
元件分类: 电源管理
英文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封装: PLASTIC, SOIC-8
文件页数: 19/25页
文件大小: 532K
代理商: X40411S8I-C
X40410/X40411/X40414/X40415
Characteristics subject to change without notice.
3 of 25
REV 1.3.6 2/11/04
www.xicor.com
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X40410/11/14/15 activates a
Power On Reset Circuit that pulls the RESET/RESET
pins active. This signal provides several benets.
– It prevents the system microprocessor from starting to
operate with insufcient voltage.
– It prevents the processor from operating prior to stabili-
zation of the oscillator.
– It allows time for an FPGA to download its conguration
prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When VCC exceeds the device VTRIP1 threshold value for
tPURST (selectable) the circuit releases the RESET
(X40411) and RESET (X40410) pin allowing the system
to begin operation.
Low Voltage VCC (V1 Monitoring)
During operation, the X40410/11/14/15 monitors the VCC
level and asserts RESET/RESET if supply voltage falls
below a preset minimum VTRIP1. The RESET/RESET
signal prevents the microprocessor from operating in a
power fail or brownout condition. The V1FAIL signal
remains active until the voltage drops below 1V. It also
remains active until VCC returns and exceeds VTRIP1 for
tPURST.
Low Voltage V2 Monitoring
The X40410/11/14/15 also monitors a second voltage
level and asserts V2FAIL if the voltage falls below a
preset minimum VTRIP2. The V2FAIL signal is either
ORed with RESET to prevent the microprocessor from
operating in a power fail or brownout condition or used to
interrupt the microprocessor with notication of an
impending power failure. For the X40410/11 the V2FAIL
signal remains active until the VCC drops below 1V (VCC
falling). It also remains active until V2MON returns and
exceeds VTRIP2 by 0.2V. This voltage sense circuitry
monitors the power supply connected to the V2MON pin.
If VCC = 0, V2MON can still be monitored.
For the X40414/15 devices, the V2FAIL signal remains
actice until VCC drops below 1Vx and remains active until
V2MON returns and exceeds VTRIP2. This sense circuitry
is powered by VCC. If VCC = 0, V2MON cannot be moni-
tored.
Figure 1. Two Uses of Multiple Voltage Monitoring
6–10V
VCC
5V
Reg
V2MON
X40411-A
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
Unreg.
Supply
VCC
X40414-C
RESET
V2FAIL
System
VCC
Reset
RESET
V2FAIL
VCC
System
Reset
Notice: No external components required to monitor two voltages.
1M
V2MON
3.3V
Reg
1.2V
Reg
V2MON
(2.9V)
57
SDA
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this tran-
sition within the watchdog time out period results in WDO going active.
68
SCL
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
71
WDO
WDO Output. WDO is an active LOW, open drain output which goes active whenever the
watchdog timer goes active.
82
VCC
Supply Voltage
PIN DESCRIPTION (Continued)
Pin
Name
Function
SOIC TSSOP
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