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参数资料
| 型号： | X98021L128-3.3-Z |
| 厂商： | INTERSIL CORP |
| 元件分类： | 消费家电 |
| 英文描述： | 210MHz Triple Video Digitizer with Digital PLL |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封装： | 14 X 20 MM, ROHS COMPLIANT, MS-022, MQFP-128 |
| 文件页数： | 21/29页 |
| 文件大小： | 294K |
| 代理商： | X98021L128-3.3-Z |
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21
FN8219.0
June 2, 2005
HSYNC and VSYNC Activity Detect
Activity on these bits always indicates valid sync pulses, so
they should have the highest priority and be used even if the
SOG activity bit is also set.
SOG Activity Detect
The SOG activity detect bit monitors the output of the SOG
slicer, looking for 64 consecutive pulses with the same
period and duty cycle. If there is no signal on the Green
(or Y) channel, the SOG slicer will clamp the video to a DC
level and will reject any sporadic noise. There should be no
false positive SOG detects if there is no video on Green
(or Y).
If there is video on Green (or Y) with no valid SOG signal,
the SOG activity detect bit may sometimes report false
positives (it will detect SOG when no SOG is actually
present). This is due to the presence of video with a
repetitive pattern that creates a waveform similar to SOG.
For example, the desktop of a PC operating system is black
during the front porch, horizontal sync, and back porch, then
increases to a larger value for the visible portion of the
screen. This creates a repetitive video waveform very
similar to SOG that may falsely trigger the SOG Activity
detect bit. However, in these cases where there is active
video without SOG, the SYNC information will be provided
either as separate H and V sync on HSYNC
IN
and
VSYNC
IN
, or composite sync on HSYNC
IN
. HSYNC
IN
and
VSYNC
IN
should therefore be used to qualify SOG. The
SOG Active bit should only be considered valid if HSYNC
Activity Detect = 0. Note: Some pattern generators can
output HSYNC and SOG simultaneously, in which case both
the HSYNC and the SOG activity bits will be set, and valid.
Even in this case, however, the monitor should still choose
HSYNC over SOG.
TriLevel Sync Detect
Unlike SOG detect, the TriLevel Sync detect function does
not check for 64 consecutive trilevel pulses in a row, and is
therefore less robust than the SOG detect function. It will
report false positives for SOG-less video for the same
reasons the SOG activity detect does, and should therefore
be qualified with both HSYNC and SOG. TriLevel Sync
Detect should only be considered valid if HSYNC Activity
Detect = 0 and SOG Activity Detect = 1.
If there is a SOG signal, the TriLevel Detect bit will operate
correctly for standard trilevel sync levels (600mVp-p). In
some real-world situations, the peak-to-peak sync amplitude
may be significantly smaller, sometimes 300mVp-p or less.
In these cases the sync slicer will continue to operate
correctly, but the TriLevel Detect bit may not be set. Trilevel
detection accuracy can be enhanced by polling the trilevel
bit multiple times. If HSYNC is inactive, SOG is present, and
the TriLevel Sync Detect bit is read as a 1, there is a high
likelihood there is trilevel sync.
CSYNC Present
If a composite sync source (either CSYNC on HSYNC or
SOG) is selected through bits 3 and 4 of register 0x05, the
CSYNC Present bit in register 0x01 should be set. CSYNC
Present detects the presence of a low frequency, repetitive
signal inside HSYNC, which indicates a VSYNC signal. The
CSYNC Present bit should be used to confirm that the signal
being received is a reliable composite sync source.
SYNC Output Signals
The X98021 has 2 pairs of HSYNC and VSYNC output
signals, HSYNC
OUT
and VSYNC
OUT
, and HS
OUT
and
VS
OUT
.
HSYNC
OUT
and VSYNC
OUT
are buffered versions of the
incoming sync signals; no synchronization is done. These
signals should be used for mode detection.
HS
OUT
and VS
OUT
are generated by the X98021’s logic
and are synchronized to the output DATACLK and the digital
pixel data on the output databus. HS
OUT
is used to signal
the start of a new line of digital data. VS
OUT
is not needed in
most applications.
Both HSYNC
OUT
and VSYNC
OUT
(including the sync
separator function) remain active in power-down mode. This
allows them to be used in conjunction with the Sync Status
registers to detect valid video without powering up the
X98021.
TABLE 6. SYNC SOURCE DETECTION TABLE
HSYNC
DETECT
VSYNC
DETECT
SOG
DETECT
TRILEVEL
DETECT
RESULT
1
1
X
X
Sync is on HSYNC and VSYNC
1
0
X
X
Sync is composite sync on HSYNC. Set Input configuration register to CSYNC on HSYNC and
confirm that CSYNC detect bit is set.
0
0
1
0
Sync is composite sync on SOG. It is possible that trilevel sync is present but amplitude is too
low to set trilevel detect bit. Use video mode table to determine if this video mode is likely to
have trilevel sync, and set clamp start, width values appropriately if it is.
0
0
1
1
Sync is composite sync on SOG. Sync is likely to be trilevel.
0
0
0
X
No valid sync sources on any input.
X98021
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| X98024 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
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| X98024L128-3.3-Z | 功能描述:IC TRPL VID DIGITIZER 128MQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 标准包装:250 系列:- 类型:电平移位器 应用:LCD 电视机/监控器 安装类型:表面贴装 封装/外壳:28-WFQFN 裸露焊盘 供应商设备封装:28-WQFN（4x4）裸露焊盘 包装:带卷 (TR) 其它名称:296-32523-2TPS65198RUYT-ND |
| X98027 | 制造商:XICOR 制造商全称:Xicor Inc. 功能描述:PRELIMINARY INFORMATION |
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