参数资料
型号: XC3090L-8PC84C
厂商: Xilinx Inc
文件页数: 24/76页
文件大小: 0K
描述: IC FPGA 3.3V C-TEMP 84-PLCC
产品变化通告: XC3000(L) Discontinuation 01/Feb/2003
标准包装: 15
系列: XC3000A/L
LAB/CLB数: 320
RAM 位总计: 64160
输入/输出数: 70
门数: 6000
电源电压: 3 V ~ 3.6 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 84-LCC(J 形引线)
供应商设备封装: 84-PLCC
R
XC3000 Series Field Programmable Gate Arrays
7-32
November 9, 1998 (Version 3.1)
Notes:
1. The max limit of CCLK Low time is caused by dynamic circuitry inside the FPGA.
2. Configuration must be delayed until the INIT of all FPGAs is High.
3. At power-up, VCC must rise from 2.0 V to VCC min in less than 25 ms. If this is not possible, configuration can be delayed by
holding RESET Low until VCC has reached 4.0 V (2.5 V for the XC3000L). A very long VCC rise time of >100 ms, or a
non-monotonically rising VCC may require a >6-s High level on RESET, followed by a >6-s Low level on RESET and D/P
after VCC has reached 4.0 V (2.5 V for the XC3000L).
Figure 30: Slave Serial Mode Programming Switching Characteristics
4 TCCH
Bit n
Bit n + 1
Bit n
Bit n - 1
3 TCCO
5 TCCL
2 TCCD
1 TDCC
DIN
CCLK
DOUT
(Output)
X5379
Description
Symbol
Min
Max
Units
CCLK
To DOUT
DIN setup
DIN hold
High time
Low time (Note 1)
Frequency
3
1
2
4
5
TCCO
TDCC
TCCD
TCCH
TCCL
FCC
60
0
0.05
100
5.0
10
ns
s
MHz
Product Obsolete or Under Obsolescence
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XC3090L-8PC84I 功能描述:IC FPGA 3.3V I-TEMP 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:XC3000A/L 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA(34.55x34.55)
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XC3100 制造商:XILINX 制造商全称:XILINX 功能描述:Logic Cell Array Families
XC3100A 制造商:XILINX 制造商全称:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3100A/L 制造商:XILINX 制造商全称:XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)