参数资料
型号: XC5206-3BG225C
厂商: Xilinx, Inc.
英文描述: Field Programmable Gate Arrays
中文描述: 现场可编程门阵列
文件页数: 37/73页
文件大小: 598K
代理商: XC5206-3BG225C
R
XC5200 Series Field Programmable Gate Arrays
7-124
November 5, 1998 (Version 5.2)
Notes: 1. A shaded table cell represents a 20-k
to 100-k pull-up resistor before and during configuration.
2. (I) represents an input (O) represents an output.
3. INIT is an open-drain output during configuration.
Table 13.
Pin Functions During Configuration
CONFIGURATION MODE:
<M2:M1:M0>
USER
OPERATION
SLAVE
<1:1:1>
MASTER-SER
<0:0:0>
SYN.PERIPH
<0:1:1>
ASYN.PERIPH
<1:0:1>
MASTER-HIGH
<1:1:0>
MASTER-LOW
<1:0:0>
EXPRESS
<0:1:0>
A16
GCK1-I/O
A17
I/O
TDI
TDI-I/O
TCK
TCK-I/O
TMS
TMS-I/O
I/O
M1 (HIGH) (I)
M1 (LOW) (I)
M1 (HIGH) (I)
M1 (LOW) (I)
M1 (HIGH) (I)
M1 (LOW) (I)
M1 (HIGH) (I)
I/O
M0 (HIGH) (I)
M0 (LOW) (I)
M0 (HIGH) (I)
M0 (LOW) (I)
I/O
M2 (HIGH) (I)
M2 (LOW) (I)
M2 (HIGH) (I)
M2 (LOW) (I)
I/O
GCK2-I/O
HDC (HIGH)
I/O
LDC (LOW)LDC (LOW)LDC (LOW)LDC (LOW)LDC (LOW)LDC (LOW)LDC (LOW)
I/O
INIT-ERROR
I/O
DONE
PROGRAM (I)
PROGRAM
DATA 7 (I)
I/O
GCK3-I/O
DATA 6 (I)
I/O
DATA 5 (I)
I/O
CSO (I)
I/O
DATA 4 (I)
I/O
DATA 3 (I)
I/O
RS (I)
I/O
DATA 2 (I)
I/O
DATA 1 (I)
I/O
RDY/BUSY
RCLK
I/O
DIN (I)
DATA 0 (I)
I/O
DOUT
I/O
CCLK (I)
CCLK (O)
CCLK (I)
CCLK (O)
CCLK (I)
TDO
TDO-I/O
WS (I)
A0
I/O
A1
GCK4-I/O
CS1 (I)
A2
CS1 (I)
I/O
A3
I/O
A4
I/O
A5
I/O
A6
I/O
A7
I/O
A8
I/O
A9
I/O
A10
I/O
A11
I/O
A12
I/O
A13
I/O
A14
I/O
A15
I/O
ALL OTHERS
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