参数资料
型号: XE8805AMI028LF
厂商: Semtech
文件页数: 50/156页
文件大小: 0K
描述: IC DAS 16BIT FLASH 8K MTP 64LQFP
标准包装: 160
系列: XE880x
应用: 感测机
核心处理器: Coolrisc816?
程序存储器类型: 闪存(22 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
输入/输出数: 24
电源电压: 2.4 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
包装: 托盘
供应商设备封装: 64-LQFP(10x10)
产品目录页面: 585 (CN2011-ZH PDF)
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
Semtech 2006
www.semtech.com
20-3
XE8805/05A
bit
RegCntD
rw
reset
function
7-0
CounterD
r
xxxxxxxx
8-bits counter value
7-0
CounterD
w
xxxxxxxx
8-bits comparison value
Table 20-4. RegCntD
Note: When writing RegCntC or RegCntD, the processor writes the counter comparison values. When reading
these locations, the processor reads back the actual counter value.
bit
RegCntCtrlCk
rw
reset
function
7-6
CntDCkSel(1:0)
rw
xx
Counter d clock selection
5-4
CntCCkSel(1:0)
rw
xx
Counter c clock selection
3-2
CntBCkSel(1:0)
rw
xx
Counter b clock selection
1-0
CntACkSel(1:0)
rw
xx
Counter a clock selection
Table 20-5. RegCntCtrlCk
bit
RegCntConfig1
rw
Reset
function
7
CntDDownUp
rw
x
Counter d up or down counting (0=down)
6
CntCDownUp
rw
x
Counter c up or down counting (0=down)
5
CntBDownUp
rw
x
Counter b up or down counting (0=down)
4
CntADownUp
rw
x
Counter a up or down counting (0=down)
3
CascadeCD
rw
x
Cascade counter c & d (1=cascade)
2
CascadeAB
rw
x
Cascade counter a & b (1=cascade)
1
CntPWM1
rw
0 resetsystem
Activate pwm1 on counter c or c+d (PB(1))
0
CntPWM0
rw
0 resetsystem
Activate pwm0 on counter a or a+b (PB(0))
Table 20-6. RegCntConfig1
bit
RegCntConfig2
rw
Reset
function
7-6
CapSel(1:0)
rw
00 resetsystem
Capture source selection
5-4
CapFunc(1:0)
rw
00 resetsystem
Capture function
3-2
Pwm1Size(1:0)
rw
xx
Pwm1 size selection
1-0
Pwm0Size(1:0)
rw
xx
Pwm0 size selection
Table 20-7. RegCntConfig2
bit
RegCntOn
rw
Reset
Function
7-4
--
r
0000
Reserved
3
CntDEnable
rw
0 resetsystem
Enable counter d
2
CntCEnable
rw
0 resetsystem
Enable counter c
1
CntBEnable
rw
0 resetsystem
Enable counter b
0
CntAEnable
rw
0 resetsystem
Enable counter a
Table 20-8. RegCntOn
20.4
Interrupts and events map
Interrupt source
Mapping in the
interrupt manager
Mapping in the event
manager
IrqA
RegIrqHigh(4)
RegEvn(7)
IrqB
RegIrqLow(5)
RegEvn(3)
IrqC
RegIrqHigh(3)
RegEvn(6)
IrqD
RegIrqLow(4)
RegEvn(2)
Table 20-9. Interrupt and event mapping.
Not
Recommended
for
New
Designs
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