参数资料
| 型号： | XRT73LC03AIV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 22/61页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 120LQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 3/3 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-LQFP（14x20） |
| 包装： | 托盘 |
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XRT73LC03A
27
REV. 1.0.4
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
The default value for each of the bit-fields within these reg-
isters is "0".
a. Operating in the Hardware Mode.
In order to configure individual Channels into the ap-
propriate mode, set the E3_(n), and the STS-1/
DS3_(n) input pins (where n = 0, 1 or 2) to the appro-
priate logic states, as presented below inTable 3.
b. Operating in the HOST Mode.
To configure a Channel into the appropriate mode,
write the appropriate values into the STS-1/DS3_(n)
and E3_(n) bit-fields within the Command Register
CR4-(n), as illustrated below (refer to Table 2 for the
correct address for each channel).
Table 4 relates the values of these two bit-fields to the
selected data rates.
2.0
THE TRANSMIT SECTION
Figure 13 indicates that the Transmit Section within
each Channel of the XRT73LC03A consists of the fol-
lowing blocks:
Transmit Logic Block
TxClk_(n) Duty Cycle Adjust Block
HDB3/(B3ZS) Encoder
Pulse Shaping Block
The purpose of the Transmit Section is to take TTL/
CMOS level data from the terminal equipment and
encode it into a format such that it can:
1. Be efficiently transmitted over coaxial cable at
E3, DS3, or STS-1 data rates.
2. Be reliably received by the Remote Terminal
Equipment at the other end of the E3, DS3, or
STS-1 data link.
3. Comply with the applicable pulse template
requirements.
2.1
THE TRANSMIT LOGIC BLOCK
The purpose of the Transmit Logic Block is to accept
either Dual-Rail or Single-Rail (e.g., a binary data
stream) TTL/CMOS level data and timing information
from the Terminal Equipment.
2.1.1
Accepting Dual-Rail Data from the Termi-
nal Equipment
Whenever the XRT73LC03A accepts Dual-Rail data
from the Terminal Equipment, it does so via the fol-
lowing input signals:
TPData_(n)
TNData_(n)
TxClk_(n)
Figure 14 illustrates the typical interface for the trans-
mission of data in a Dual-Rail Format between the
Terminal Equipment and the Transmit Section of the
XRT73LC03A.
TABLE 3: SELECTING THE DATA RATE FOR CHANNEL(n) VIA THE E3_(n) AND STS-1/DS3_(n) INPUT PINS
(HARDWARE MODE)
DATA RATE
STATE OF E3_
(n) PIN
STATE OF STS-1/DS3_
(n) PIN
MODE OF B3ZS/HDB3 ENCODER/
DECODER BLOCKS
E3 (34.368 Mbps)
1
X (Don't Care)
HDB3
DS3 (44.736 Mbps)
0
B3ZS
STS-1 (51.84 Mbps)
0
1
B3ZS
COMMAND REGISTER, CR4-(n)
D4
D3
D2
D1
D0
X
STS-1/(DS3)_(n))
E3_(n)
LLB_(n) RLB_(n)
x
xx
x
TABLE 4: SELECTING THE DATA RATE FOR CHANNEL(n)
VIA THE
STS-1/DS3_(n) AND THE E3_(n) BIT-FIELDS
WITHIN THE
APPROPRIATE COMMAND REGISTER (HOST
MODE)
SELECTED DATA
RATE
STS-1/DS3_
(n)
(D3)
E3_
(n)
(D2)
E3
X (Don't Care)
1
DS3
0
STS-1
1
0
相关PDF资料 |
PDF描述 |
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| XRT73LC04AIV-F | IC LIU E3/DS3/STS-1 4CH 144LQFP |
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相关代理商/技术参数 |
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| XRT73LC04A | 制造商:EXAR 制造商全称:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04A_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04AES | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| XRT73LC04AIV | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT73LC04AIV-F | 功能描述:外围驱动器与原件 - PCI 4-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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