参数资料
| 型号： | XRT73LC03AIV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 34/61页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 120LQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 3/3 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-LQFP（14x20） |
| 包装： | 托盘 |
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XRT73LC03A
I
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.4
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
FEATURES .................................................................................................................................................... 1
APPLICATIONS ......................................................................................................................................... 1
TYPICAL APPLICATIONS ................................................................................................................................. 2
TRANSMIT INTERFACE CHARACTERISTICS: ..................................................................................................... 2
RECEIVE INTERFACE CHARACTERISTICS: ....................................................................................................... 2
ORDERING INFORMATION ............................................................................................... 3
PIN DESCRIPTIONS (BY FUNCTION) .............................................................................. 4
TRANSMIT INTERFACE ................................................................................................................................... 4
RECEIVE INTERFACE ..................................................................................................................................... 6
CLOCK INTERFACE ........................................................................................................................................ 7
OPERATING MODE SELECT ........................................................................................................................... 7
CONTROL AND ALARM INTERFACE ................................................................................................................. 9
MICROPROCESSOR INTERFACE .................................................................................................................... 11
POWER AND GROUND PINS ......................................................................................................................... 13
NO CONNECTION PINS ................................................................................................................................ 14
ELECTRICAL CHARACTERISTICS ................................................................................ 15
ABSOLUTE MAXIMUM RATINGS .................................................................................................................... 15
SYSTEM DESCRIPTION .................................................................................................. 24
THE TRANSMIT SECTION - CHANNELS 0, 1 AND 2 ......................................................................................... 24
THE RECEIVE SECTION - CHANNELS 0, 1 AND 2 ........................................................................................... 24
THE MICROPROCESSOR SERIAL INTERFACE ................................................................................................. 24
1.0 Selecting the Data Rate .................................................................................................................... 25
1.1 CONFIGURING CHANNEL(N) ............................................................................................................................... 25
COMMAND REGISTER, CR4-(N) ...................................................................................................... 27
2.0 The Transmit Section ....................................................................................................................... 27
2.1 THE TRANSMIT LOGIC BLOCK ............................................................................................................................ 27
2.1.1 Accepting Dual-Rail Data from the Terminal Equipment ...................................................................... 27
2.1.2 Accepting Single-Rail Data from the Terminal Equipment ................................................................... 28
COMMAND REGISTER CR1-(N) ....................................................................................................... 28
2.2 THE TRANSMIT CLOCK DUTY CYCLE ADJUST CIRCUITRY ................................................................................... 29
2.3 THE HDB3/B3ZS ENCODER BLOCK .................................................................................................................. 29
2.3.1 B3ZS Encoding .................................................................................................................................... 29
2.3.2 HDB3 Encoding .................................................................................................................................... 30
2.3.3 Disabling the HDB3/B3ZS Encoder ..................................................................................................... 30
COMMAND REGISTER CR2-(N) ....................................................................................................... 30
2.4 THE TRANSMIT PULSE SHAPING CIRCUITRY ....................................................................................................... 31
2.4.1 Enabling the Transmit Line Build-Out Circuit ....................................................................................... 32
COMMAND REGISTER, CR1-(N) ...................................................................................................... 32
2.4.2 Disabling the Transmit Line Build-Out Circuit ....................................................................................... 32
COMMAND REGISTER, CR1-(N) ...................................................................................................... 33
2.4.3 Design Guideline for Setting the Transmit Line Build-Out Circuit ......................................................... 33
2.4.4 The Transmit Line Build-Out Circuit and E3 Applications .................................................................... 33
2.5 INTERFACING THE TRANSMIT SECTIONS OF THE XRT73LC03A TO THE LINE ...................................................... 33
TRANSFORMER RECOMMENDATIONS ............................................................................................... 34
3.0 The Receive Section ......................................................................................................................... 35
3.1 INTERFACING THE RECEIVE SECTIONS OF THE XRT73LC03A TO THE LINE ........................................................ 35
3.2 THE RECEIVE EQUALIZER BLOCK ...................................................................................................................... 36
3.2.1 Guidelines for Setting the Receive Equalizer ...................................................................................... 36
COMMAND REGISTER CR2-(N) ....................................................................................................... 37
3.3 CLOCK RECOVERY PLL .................................................................................................................................... 38
3.3.1 The Training Mode ............................................................................................................................... 38
3.3.2 The Data/Clock Recovery Mode .......................................................................................................... 38
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| XRT73LC04A | 制造商:EXAR 制造商全称:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
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