参数资料
| 型号： | XRT75R03DIV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 18/135页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 3/3 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-LQFP（14x20） |
| 包装： | 托盘 |
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XRT75R03D
110
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
10.3.4
Why are we talking about Pointer Adjustments?
The overall SONET network consists of numerous "Synchronization Islands". As a consequence, whenever a
SONET signal is being transmitted from one "Synchronization Island" to another; that SONET signal will
undergo a "clock domain" change as it traverses the network. This clock domain change will result in periodic
pointer-adjustments occurring within this SONET signal. Depending upon the direction of this "clock-domain"
shift that the SONET signal experiences, there will either be periodic "incrementing" pointer-adjustment events
or periodic "decrementing" pointer-adjustment events within this SONET signal.
Regardless of whether a given SONET signal is experiencing incrementing or decrementing pointer
adjustment events, each pointer adjustment event will result in an abrupt 8-bit shift in the position of the SPE
within the STS-1 data-stream. If this STS-1 signal is transporting an "asynchronously-mapped" DS3 signal;
then this 8-bit shift in the location of the SPE (within the STS-1 signal) will result in approximately 8UIpp of jitter
within the asynchronously-mapped DS3 signal, as it is de-mapped from SONET. In “Section 10.5, A Review
of the Category I Intrinsic Jitter Requirements (per Telcordia GR-253-CORE) for DS3 applications” on
page 111
we will discuss the "Category I Intrinsic Jitter Requirements (for DS3 Applications) per Telcordia GR-
253-CORE. However, for now we will simply state that this 8UIpp of intrinsic jitter far exceeds these "intrinsic
jitter" requirements.
In summary, pointer-adjustments events are a "fact of life" within the SONET/SDH network. Further, pointer-
adjustment events, within a SONET signal that is transporting an asynchronously-mapped DS3 signal, will
impose a significant impact on the Intrinsic Jitter and Wander within that DS3 signal as it is de-mapped from
SONET.
10.4
Clock Gapping Jitter
In most applications (in which the XRT75R03D will be used in a SONET De-Sync Application) the user will
typically interface the XRT75R03D to a Mapper Device in the manner as presented below in Figure 48.
In this application, the Mapper IC will have the responsibility of receiving an STS-N signal (from the SONET
Network) and performing all of the following operations on this STS-N signal.
Byte-de-interleaving this incoming STS-N signal into N STS-1 signals
Terminating each of these STS-1 signals
Extracting (or de-mapping) the DS3 signal(s) from the SPEs within each of these terminated STS-1 signals.
FIGURE 48. ILLUSTRATION OF THE TYPICAL APPLICATIONS FOR THE XRT75R03D IN A SONET DE-SYNC APPLICA-
TION
DS3 to STS-N
Mapper/
Demapper
IC
DS3 to STS-N
Mapper/
Demapper
IC
XRT75R03D
STS-N Signal
TPDATA_n input pin
TCLK_n input
De-Mapped (Gapped)
DS3 Data and Clock
相关PDF资料 |
PDF描述 |
|---|---|
| XRT75R03IV-F | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| XRT75R06DIB-F | IC LIU E3/DS3/STS-1 6CH 217BGA |
| XRT75R06IB-F | IC LIU E3/DS3/STS-1 6CH 217BGA |
| XRT75R12DIB-L | IC LIU E3/DS3/STS-1 12CH 420TBGA |
| XRT75R12IB-L | IC LIU E3/DS3/STS-1 12CH 420TBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT75R03DIVTR | 功能描述:时钟合成器/抖动清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75R03DIVTR-F | 功能描述:接口 - 专用 RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| XRT75R03ES | 功能描述:时钟合成器/抖动清除器 3CH T3/E3/STS1LIU+JA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75R03IV | 功能描述:外围驱动器与原件 - PCI 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT75R03IV-F | 功能描述:外围驱动器与原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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