参数资料
型号: XRT83VSH28IB
厂商: Exar Corporation
文件页数: 59/75页
文件大小: 0K
描述: IC LIU SH E1 OCTAL 225BGA
标准包装: 84
类型: 线路接口装置(LIU)
驱动器/接收器数: 8/8
规程: T1,E1,J1
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 225-BGA
供应商设备封装: 225-BGA(19x19)
包装: 托盘
XRT83VSH28
59
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 2.0.0
D1
INSBER
Insert Bit Error
When this bit transitions from a "0" to a "1", a bit error will be
inserted in the transmitted QRSS/PRBS pattern. The state of this
bit will be sampled on the rising edge of TCLK. To ensure proper
operation, it is recommended to write a "0" to this bit before writing
a "1".
R/W
0
D0
Reserved
TABLE 27: MICROPROCESSOR REGISTER 0X04H BIT DESCRIPTION
CHANNEL 0-7(0X04H-0X74H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used.
D6
DMOIE
Digital Monitor Output Interrupt Enable
0 = Masks the DMO function
1 = Enables Interrupt Generation
R/W
0
D5
FLSIE
FIFO Limit Status Interrupt Enable
0 = Masks the FLS function
1 = Enables Interrupt Generation
R/W
0
D4
LCV/OFIE
Line Code Violation / Counter Overflow Interrupt Enable
0 = Masks the LCV/OF function
1 = Enables Interrupt Generation
R/W
0
D3
Reserved
This Register Bit is Not Used.
D2
AISIE
Alarm Indication Signal Interrupt Enable
0 = Masks the AIS function
1 = Enables Interrupt Generation
R/W
0
D1
RLOSIE
Receiver Loss of Signal Interrupt Enable
0 = Masks the RLOS function
1 = Enables Interrupt Generation
R/W
0
D0
QRPDIE
Quasi Random Signal Source Interrupt Enable
0 = Masks the QRPD function
1 = Enables Interrupt Generation
R/W
0
TABLE 26: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION
CHANNEL 0-7 (0X03H-0X73H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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