参数资料
| 型号： | XRT91L31IQ-F |
| 厂商： | Exar Corporation |
| 文件页数： | 4/41页 |
| 文件大小： | 0K |
| 描述： | IC TXRX SONET/SDH 8BIT 64QFP |
| 标准包装： | 1 |
| 类型： | 收发器，多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH |
| 输入： | LVCMOS，LVPECL，LVTTL |
| 输出： | LVCMOS，LVPECL，LVTTL |
| 电路数： | 1 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 622.08MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-FQFP |
| 供应商设备封装： | 64-PQFP（10x10） |
| 包装： | 托盘 |
| 其它名称： | 1016-1361 |
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XRT91L31
12
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
REV. 1.0.2
POWER AND GROUND
FRAMEPULSE
LVTTL,
LVCMOS
O
30
Sonet Frame Alignment Pulse
This pin will generate a single pulse for an RXPCLKO clock
period upon the detection of the third frame alignment A2 byte
whenever the OOF input pin is held High. The parallel received
data output bus will then be byte aligned to this newly recov-
ered SONET/SDH frame.
CAP1P
CAP2P
Analog
-
39
42
CDR Non-polarized External Filter Capacitor
C1 = 0.47
μF ± 10% tolerance
(Isolate from noise and place close to pin)
CAP1N
CAP2N
Analog
-
40
41
CDR Non-polarized External Filter Capacitor
C2 = 0.47
μF ± 10% tolerance
(Isolate from noise and place close to pin)
DLOSDIS
LVTTL,
LVCMOS
I
7
LOS (Los of Signal) Detect Disable
Disables internal LOS monitoring and automatic muting of
RXDO[7:0] upon LOS detection. LOS is declared when a string
of 128 consecutive zeros occur on the line. LOS condition is
cleared when the 16 or more pulse transitions is detected for
128 bit period sliding window (see
Figure 7.)
"Low" = Monitor and Mute received data upon LOS declaration
"High" = Disable internal LOS monitoring
LOSEXT
SE-LVPECL
I
33
LOS or Signal Detect Input from Optical Module
Active "Low." When active, this pin can force the received data
output bus RXDO[7:0] to a logic state of ’0’ per
"Low" = Forced LOS
"High" = Normal Operation
PIN DESCRIPTION
NAME
TYPE
PIN
DESCRIPTION
VDD3.3
PWR
18, 31, 34, 47, 61
3.3V CMOS Power Supply
VDD3.3 should be isolated from the Analog VDD power supplies.
Use a ferrite bead along with an internal power plane separation.
The VDD3.3 power supply pins should have bypass capacitors to
the nearest ground.
AVDD3.3_TX
PWR
38
Analog 3.3V Transmitter Power Supply
AVDD3.3_TX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_TX power supply pins should
have bypass capacitors to the nearest ground.
AVDD3.3_RX
PWR
43
Analog 3.3V Receiver Power Supply
AVDD3.3_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_RX power supply pins should
have bypass capacitors to the nearest ground.
PIN DESCRIPTION
NAME
LEVEL
TYPE
PIN
DESCRIPTION
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT91L31IQ-F | 制造商:Exar Corporation 功能描述:SONET Transceiver IC |
| XRT91L31IQTR | 功能描述:总线收发器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| XRT91L31IQTR-F | 功能描述:总线收发器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| XRT91L32 | 制造商:EXAR 制造商全称:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L32ES | 功能描述:LIN 收发器 SONET SDH 8 bit TRANCEIVER RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
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