参数资料
型号: XRT91L31IQ-F
厂商: Exar Corporation
文件页数: 7/41页
文件大小: 0K
描述: IC TXRX SONET/SDH 8BIT 64QFP
标准包装: 1
类型: 收发器,多路复用器
PLL:
主要目的: 以太网,SONET/SDH
输入: LVCMOS,LVPECL,LVTTL
输出: LVCMOS,LVPECL,LVTTL
电路数: 1
差分 - 输入:输出: 是/是
频率 - 最大: 622.08MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-FQFP
供应商设备封装: 64-PQFP(10x10)
包装: 托盘
其它名称: 1016-1361
XRT91L31
15
REV. 1.0.2
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
2.0
RECEIVE SECTION
The receive section of XRT91L31 include the inputs RXIP/N, followed by the clock and data recovery unit
(CDR) and receive serial-to-parallel converter. The receiver accepts the high speed Non-Return to Zero (NRZ)
serial data at 622.08 Mbps or 155.52 Mbps through the input interfaces RXIP/N. The clock and data recovery
unit recovers the high-speed receive clock from the incoming scrambled NRZ data stream. The recovered
serial data is converted into an 8-bit-wide, 77.76 Mbps or 19.44 Mbps parallel data and presented to the
RXDO[7:0] parallel interface. This parallel interface is designed for Single-Ended LVTTL operation. A divide-
by-8 version of the high-speed recovered clock RXPCLKOP/N, is used to synchronize the transfer of the 8-bit
RXDO[7:0] data with the receive portion of the framer/mapper device. Upon initialization or loss of signal or
loss of lock, the external reference clock signal of 19.44 MHz or 77.76 MHz is used to start-up the clock
recovery phase-locked loop for proper operation. In certain applications, the CDR block on the XRT91L31 can
be disabled and bypassed by enabling the CDRDIS pin to permit the flexibility of using an externally recovered
receive clock thru the XRXCLKIP/N pins.
2.1
Receive Serial Input
The receive serial inputs are applied to RXIP/N and originate from an AC coupled environement (i.e. AC-
coupled SFP). A simplified block diagram is shown in Figure 3. Since this dievice has internal pull up/pull
down biasing resitors, a 100
line-to-line termination is the only resistor needed and must be installed as
close to the RXI pins as possible. See Applications note for further clarifications.
FIGURE 3. RECEIVE SERIAL INPUT INTERFACE BLOCK
Ω
RXIP
RXIN
Optical Fiber
XRT91L31
STS-12/ STM-4
or
STS-3/ STM-1
Transceiver
XRXCLKIP
XRXCLKIN
( optional)
1k
Install terminators close to
RXIP and RXIN pins
Tie unused differential input pins
to VCC and GND
Internally AC coupled
SFP , Optical Module
100 Ohm
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XRT91L31IQ-F 制造商:Exar Corporation 功能描述:SONET Transceiver IC
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