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参数资料
| 型号： | ZL30402/QCC1 |
| 厂商： | ZARLINK SEMICONDUCTOR INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP80 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, MS-026BEC, LQFP-80 |
| 文件页数： | 2/44页 |
| 文件大小： | 472K |
| 代理商： | ZL30402/QCC1 |
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ZL30402
Data Sheet
10
Zarlink Semiconductor Inc.
53
C34/C44
Clock 34.368 MHz / clock 44.736 MHz (CMOS Output). This clock is
programmable to be either 34.368 MHz (for E3 applications) or 44.736 MHz
(for DS3 applications) when E3DS3/OC3 is high, or to be either 8.592MHz or
11.184 MHz when E3DS3/OC3 is low. See description of E3DS3/OC3 and
E3/DS3 inputs for details. In Software Control the functionality of this output is
controlled by Control Register 2 (Table 7 "Control Register 2 (R/W)").
54
VDD
Positive Power Supply.
55
HOLDOVER
Holdover Indicator (CMOS output). Logic high at this output indicates that the
device is in Holdover mode.
56
NC
No internal bonding Connection. Leave unconnected.
57
LOCK
Lock Indicator (CMOS output). Logic high at this output indicates that
ZL30402 is locked to the input reference.
58
NC
No internal bonding Connection. Leave unconnected.
59
DS
Data Strobe (5 V tolerant input). This input is the active low data strobe of the
processor interface.
60
IC
Internal Connection. Connect to ground.
61
IC
Internal Connection. Leave unconnected.
62
OE
Output Enable (Input). Logic high on this input enables C19, F16, C16, C8,
C6, C4, C2, C1.5, F8 and F0 signals. Pulling this input low will force the output
clocks pins into a high impedance state.
63
CS
Chip Select (5 V tolerant input). This active low input enables the
microprocessor interface. When CS is set to high, the microprocessor interface
is idle and all Data Bus I/O pins will be in a high impedance state.
64
RESET
RESET (5 V tolerant input). This active low input forces the ZL30402 into a
RESET state. The RESET pin must be held low for a minimum of 1s to reset
the device properly. The ZL30402 must be reset after power-up.
65
HW
Hardware/Software Control (Input). If this pin it tied low, the ZL30402 is
controlled via the microport. If it is tied high, the ZL30402 is controlled via the
control pins MS1, MS2, FCS, RefSel, RefAlign, E3/DS3 and E3DS3/OC3.
66-69
D0 - D3
Data 0 to Data 3 (5 V tolerant three-state I/O). These signals combined with
D4 - D7 form the bi-directional data bus of the microprocessor interface (D0 is
the least significant bit).
70
GND
Ground.
71
IC
Internal Connection (Input). Connect this pin to ground.
72
IC
Internal Connection (Input). Connect this pin to ground.
73
VDD
Positive Power Supply.
Pin Description (continued)
Pin #
Name
Description
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PDF描述 |
|---|---|
| ZL30402/QCG1 | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP80 |
| ZL50112GAG2 | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| ZL50112GAG | SPECIALTY TELECOM CIRCUIT, PBGA552 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL30402QCG1 | 制造商:Microsemi Corporation 功能描述:PB FREE SONET / SDH NETWORK ELEMENT PLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC NETWORK PLL SONET/SDH 80LQFP 制造商:Microsemi Corporation 功能描述:IC NETWORK PLL SONET/SDH 80LQFP |
| ZL30406 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
| ZL30406_06 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
| ZL30406QGC | 制造商:Zarlink Semiconductor Inc 功能描述:PLL CLOCK MLTPLR SGL UP TO 19.44MHZ 64TQFP - Trays |
| ZL30406QGC1 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
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