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参数资料
| 型号： | ZL50112GAG |
| 厂商： | ZARLINK SEMICONDUCTOR INC |
| 元件分类： | 通信及网络 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| 封装： | 35 X 35 MM, 1.27 MM, PLASTIC, BGA-552 |
| 文件页数： | 69/113页 |
| 文件大小： | 1923K |
| 代理商： | ZL50112GAG |
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ZL50110/11/12/14
Data Sheet
59
Zarlink Semiconductor Inc.
5.3
TDM Interface
The ZL50110/11/12/14 family offers the following types of TDM service across the packet network:
Unstructured services are fully asynchronous, and include full support for clock recovery on a per stream basis.
Both adaptive and differential clock recovery mechanisms can be used. Structured services are synchronous, with
all streams driven by a common clock and frame reference. These services can be offered in two ways:
Synchronous master mode - the ZL50110/11/12/14 provides a common clock and frame pulse to all
streams, which may be locked to an incoming clock or frame reference
Synchronous slave mode - the ZL50110/11/12/14 accepts a common external clock and frame pulse to be
used by all streams
In either mode, N x 64 Kbps trunking is supported as detailed in “Structured Payload Order” on page 63.
The ZL50110/11/12/14 supports structured mode or unstructured mode, however it does not support structured
mode and unstructured mode at the same time, all ports are either structured or unstructured. In structured mode,
all TDM inputs must be synchronous.
In addition, it can be used with a variety of different protocols. It includes full support for the IETF RFCs for
CESoPSN (Circuit Emulation Services over Packet Switched Networks) and SAToP (Structure-Agnostic Transport
over Packet) protocols.
5.3.1
TDM Interface Block
The TDM Access Interface consists of up to 32 streams (depending on variant), each with an input and an output
data stream operating at either 1.544 Mbps or 2.048 Mbps. It contains two basic types of interface: unstructured
clock and data, for interfacing directly to a line interface unit; or structured, framed data, for interfacing to a framer
or TDM backplane.
Unstructured data is treated asynchronously, with every stream using its own clock. Clock recovery is provided on
each output stream, to reproduce the TDM service frequency at the egress of the packet network. Structured data is
treated synchronously, i.e., all data streams are timed by the same clock and frame references. These can either be
supplied from an external source (slave mode) or generated internally using the on-chip stratum 4/4E DPLL (master
mode).
Service type
TDM interface
Interface type
Interfaces to
Unstructured
asynchronous
T1, E1, J2, E3 and T3
Bit clock in and out
Data in and out
Line interface unit
Structured synchronous
(N x 64 Kbps)
T1, E1 and J2
Framed TDM data streams at
2.048 and 8.192 Mbps
Bit clock out
Frame pulse out
Data in and out
Framers
TDM backplane (master)
Bit clock in
Frame in
Data in and out
Framers
TDM backplane (slave)
Table 25 - TDM Services Offered by the ZL50110/11/12/14 Family
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50112GAG2 | 制造商:Microsemi Corporation 功能描述:PBFREE CCT EMULATION SERV OVER PACKET-16 制造商:Microsemi Corporation 功能描述:PBFREE CCT EMULATION SERV OVER PACKET-16 - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 552PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 552PBGA |
| ZL50114 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:128, 256, 512 and 1024 Channel CESoP Processors |
| ZL50114GAG | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 552BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 552PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 552PBGA |
| ZL50114GAG2 | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 552BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 552PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 552PBGA |
| ZL50115 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
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