参数资料
型号: 4450HG/3-K
厂商: EXAR CORP
元件分类: 微控制器/微处理器
英文描述: MICROPROCESSOR, PBGA324
封装: ROHS COMPLIANT, HSBGA-324
文件页数: 31/92页
文件大小: 780K
代理商: 4450HG/3-K
4450 – Data Sheet, DS-0131-06
Page 37
Hifn Confidential
6.2.1.3
GMAC GMII/TBI Pin Descriptions (Host-side Only)
Table 6-4 contains the pin descriptions for either the host ports when configured in MAC
mode.
Table 6-4. 4450 GMII/TBI pin descriptions - MAC mode (Host Only) (Sheet 1 of 2)
Pin Name
GMII/TBI Signal
I/O
Description
hx_ctrl_1
col
in
Collision Detect: asserted high
asynchronously by PHY upon detection of a
collision on the medium. Remains asserted
as long as the collision condition persists.
Only used with half-duplex connections. This
signal must either be connected to the PHY
or tied high.
hx_ctrl_0
GMII: crs;
TBI: sigdet
in
Carrier Sense: asserted high asynchronously
by the external PHY upon detection of a non-
idle medium.
In TBI mode, this signals PHY signal
detection This signal must be asserted high
for normal operation, and must either be
connected to the PHY or tied high.
hx_clk_2
GMII: gtx_clk
TBI: txpma_clk
out
In GMII mode, transmit data clock: sourced
by the 4450 as a reference clock for
transmitted data. Clock is 125MHz for GbE.
In TBI mode, 125MHz reference for TX_DAT
bus data.
hx_clk_1
GMII: rx_clk
TBI: rx_pma_clk_1
in
In GMII mode, receive data clock: sourced
by the PHY from recovered clock from
incoming data. Clock is 125MHz for GbE,
25MHz for 100FE, 2.5MHz for 10Mb Ethernet.
In TBI mode, receive PMA clock 1, 62.5MHz,
clocking odd bytes from TBI interface on the
rising edge of clock.
hx_clk_0
GMII: tx_clk
TBI: rx_pma_clk_0
in
In GMII mode, transmit data clock: sourced
by the PHY as a reference clock for
transmitted data. Clock is 25MHz for 100FE,
2.5MHz for 10Mb Ethernet.
In TBI mode, receive PMA clock 0, 62.5MHz,
clocking even bytes from TBI interface on the
rising edge of clock.
hx_bus1[9]
GMII: rx_er
TBI: rx_dat[9]
in
In GMII mode, asserted high by the PHY if a
media error is detected.In TBI mode,
additional receive input. Used with other
RX_DAT inputs to form ten bit bus
RX_DAT[9:0].
hx_bus1[8]
GMII: rx_dv
TBI: rx_dat[8]
in
In GMII mode, receive data valid: driven
high by PHY to indicate valid recovered data
on RX_DAT bus.
In TBI mode, additional receive input. Used
with other RX_DAT inputs to form ten bit bus
RX_DAT[9:0].
hx_bus1[7:0]
rx_dat[7:0]
in
Receive data for GbE. Only RX_DAT[3:0]
used for 10/100FE(MII mode.
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