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参数资料
| 型号： | 4450HG/3-K |
| 厂商： | EXAR CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROPROCESSOR, PBGA324 |
| 封装： | ROHS COMPLIANT, HSBGA-324 |
| 文件页数： | 42/92页 |
| 文件大小： | 780K |
| 代理商： | 4450HG/3-K |
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4450 – Data Sheet, DS-0131-06
Page 47
Hifn Confidential
Table 6-11 contains the pin descriptions for the RGMII/RTBI network interface port when
configured in PHY mode.
nx_ctrl_0
RGMII: nx_tx_ctl
RTBI: nx_txd[4]
out
In RTBI mode, contains the fifth bit on the
rising edge of txc and the tenth bit on the
falling edge of rxc.
In RGMII mode, txdv on the rising edge of
txc and a logical derivative of txdv (i.e., txdv
XOR txerr) on the falling edge of txc.
nx_bus0[3:0]
nx_txd[3:0]
out
In RTBI mode, contains bits [3:0] on the
rising edge of txc and bits [8:5] on the
falling edge of txc.
In RGMII mode, bit [3:0] on rising edge of
txc, bits [7:4] on the falling edge of txc.
Note
nx = n0 or n1
Table 6-11. 4450 RGMII/RTBI Network pin descriptions - PHY mode
Pin Name
RGMII/RTBI Signal
I/O
Description
nx_clk_1
nx_txc
in
The receive reference clock will be 125MHz,
25MHz or 2.5MHz.
nx_ctrl_1
RGMII: nx_tx_ctl
RTBI: nx_txd[4]
in
In RTBI mode, contains the fifth bit on the
rising edge of rxc and the tenth bit on the
falling edge of rxc.
In RGMII mode, rxdv on the rising edge of
rxc and a logical derivative of rxdv (i.e., rxdv
XOR rxerr) on the falling edge of rxc.
nx_bus1[3:0]
nx_txd[3:0]
in
In RTBI mode, contains bits [3:0] on the
rising edge of rxc and bits [8:5] on the
falling edge of rxc.
In RGMII mode, bit [3:0] on rising edge of
rxc, bits [7:4] on the falling edge of rxc.
nx_clk_0
nx_rxc
out
The transmit reference clock will be 125MHz,
25MHz or 2.5MHz.
nx_ctrl_0
RGMII: nx_rx_ctl
RTBI: nx_rxd[4]
out
In RTBI mode, contains the fifth bit on the
rising edge of txc and the tenth bit on the
falling edge of rxc.
In RGMII mode, rxdv on the rising edge of
rxc and a logical derivative of rxdv(rxdv XOR
rxerr) on the falling edge of rxc.
nx_bus0[3:0]
nx_rxd[3:0]
out
In RTBI mode, contains bits [3:0] on the
rising edge of txc and bits [8:5] on the
falling edge of txc.
In RGMII mode, bit [3:0] on rising edge of
txc, bits [7:4] on the falling edge of txc.
Note
nx = n0 or n1
Table 6-10. 4450 RGMII/RTBI Network pin descriptions - MAC mode
Pin Name
RGMII/RTBI Signal
I/O
Description
相关PDF资料 |
PDF描述 |
|---|---|
| 4450HA/3-K | MICROPROCESSOR, PBGA324 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
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