参数资料
型号: 5962R9855201VYC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 12 MHz, RISC MICROCONTROLLER, CQFP132
封装: QFP-132
文件页数: 31/64页
文件大小: 1464K
代理商: 5962R9855201VYC
37
Destination: This field specifies the register the UT69R000
uses for the destination of the instruction.
Source: This field specifies the register the UT69R000 uses
for the Instruction Source.
Immediate: If needed, this field contains the 16-bits of
immediate data the UT69R000 requires for the long-
immediate instruction.
9.3 Operand Addressing Modes
The UT69R000’s instruction set supports four basic addressing
modes. All instructions require a source operand and a
destination operand. The destination operand is a data register
(RDn or XRDn) for all instructions, except the Jump on
Condition (JC) instruction where the destination register
contains a template for the jump condition tested for in the
instruction. The source operand can be either a data register or
immediate data for all instructions.
The source operand can also be addressed in an indirect mode.
In an indirect addressing mode, the source data register or the
Stack Pointer contains an effective address. This address points
to the memory location for operand data the UT69R000 uses
during the current instruction execution. This type of memory
addressing is only used with the Load (LR), Store (STR),
PUSH, and POP instructions.
Destination Addressing Mode
The destination operand is given explicitly for all UT69R000
instructions. The UT69R000 encodes a five-bit field, bits 9
through 5, in each instruction as follows:
R0 -- 00000
XR0 -- 10000
R1 -- 00001
R16 -- 10001
R2 -- 00010
XR2 -- 10010
R3 -- 00011
R17 -- 10011
R4 -- 00100
XR4 -- 10100
R5 -- 00101
XR16 -- 10110
R6 -- 10110
R7 -- 00111
XR8 -- 11000
R8 -- 01000
R18 -- 11001
R10 -- 01010
XR10 -- 11010
R11 -- 01011
R19 -- 11011
R12 -- 01100
XR12 -- 11100
R13 -- 01101
XR18 -- 11101
R14 -- 01110
XR14 -- 11110
R15 -- 01111
ACC -- 11111
NUL -- 10111
Source Addressing Modes
The UT69R000 directly addresses the source operand by using
one of three normal modes: (1) Data Register Direct; (2)
Literal; and (3) Immediate Long Data.
Data Register Direct
When the UT69R000 uses the Data Register Direct mode, the
source operand is one of the data registers. The data register is
explicitly stated for all instructions. The UT69R000 encodes
a 5-bit field, bits 4 through 0, in each instruction as follows:
R0 -- 00000
XR0 -- 10000
R1 -- 00001
R16 -- 10001
R2 -- 00010
XR2 -- 10010
R3 -- 00011
R17 -- 10011
R4 -- 00100
XR4 -- 10100
R5 -- 00101
XR16 -- 10101
R6 -- 00110
XR6 -- 10110
R7 -- 00111
R8 -- 01000
XR8 -- 11000
R9 -- 01001
R18 -- 11001
R10 -- 01010
XR10 -- 11010
R11 -- 01011
R19 -- 11011
R12 -- 01100
XR12 -- 11100
R13 -- 01101
XR18 -- 11101
R14 -- 01110
XR14 -- 11110
R15 -- 01111
Reserved -- 10111
and 11111
Literal
When the UT69R000 uses the Literal mode, the source operand
is a 5-bit literal data value. The UT69R000 explicitly states this
literal data value for the instructions. The UT69R000 encodes
a 5-bit field, bits 4 through 0, in each instruction as follows:
0 -- 00000
-16 -- 10000
+1 -- 00001
-15 -- 10001
+2 -- 00010
-14 -- 10010
+3 -- 00011
-13 -- 10011
+4 -- 00100
-12 -- 10100
+5 -- 00101
-11 -- 10101
+6 -- 00110
-10 -- 10110
+7 -- 00111
- 9 -- 10111
+8 -- 01000
- 8 -- 11000
+9 -- 01001
- 7 -- 11001
+10 -- 01010
- 6 -- 11010
+11 -- 01011
- 5 -- 11011
+12 -- 01100
- 4 -- 11100
+13 -- 01101
- 3 -- 11101
+14 -- 01110
- 2 -- 11110
+15 -- 01111
- 1 -- 11111
Immediate Long
When the UT69R000 uses the Immediate Long mode, the
source operand is a 16-bit data value. The UT69R000 explicitly
states this data for all instructions and encodes the 16-bit data
in a second 16-bit instruction word (figure 32). The UT69R000
encodes the 5-bit field of the instruction source field, bits 4
through 0, as follows:
IMM -- 11111
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