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参数资料
| 型号： | 5V19EE904NLGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 5V SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 封装： | 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-32 |
| 文件页数： | 11/29页 |
| 文件大小： | 292K |
| 代理商： | 5V19EE904NLGI |
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IDT5V19EE904
EEPROM PROGRAMMABLE VCXO CLOCK GENERATOR
CLOCK SYNTHESIZER
IDT EEPROM PROGRAMMABLE VCXO CLOCK GENERATOR
19
IDT5V19EE904
REV H 042211
AC Timing Electrical Characteristics
(Spread Spectrum Generation = OFF)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
fIN
1
1.Practical lower frequency is determined by loop filter settings.
Input Frequency
Input frequency limit (CLKIN)
1
200
MHz
Input frequency limit (XIN/REF)
8
100
MHz
1 / t1
Output Frequency
Single ended clock output limit
0.001
200
MHz
fVCO
VCO Frequency
VCO operating frequency range
100
1200
MHz
fPFD
PFD Frequency
PFD operating frequency range
0.5 1
100
MHz
fBW
Loop Bandwidth
Based on loop filter resistor and capacitor
values
0.01
10
MHz
t2
Input Duty Cycle
Duty Cycle for input
40
60
%
t3
Output Duty Cycle
Measured at VDD/2, all outputs except
Reference output
45
55
%
Measured at VDD/2, Reference output
40
60
%
t4 2
2.A slew rate of 2.75V/ns or greater should be selected for output frequencies of 100MHz or higher.
Slew Rate, SLEW[1:0] = 00
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 15 pF)
3.5
V/ns
Slew Rate, SLEW[1:0] = 01
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 15 pF)
2.75
Slew Rate, SLEW[1:0] = 10
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 15 pF)
2
Slew Rate, SLEW[1:0] = 11
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 15 pF)
1.25
t7
Clock Jitter
Peak-to-peak period jitter, 1PLL, multiple
output frequencies switching
80
100
ps
Peak-to-peak period jitter, all 4 PLLs on3
3.Jitter measured with clock outputs of 27 MHz, 48 MHz, 24.576 MHz, 74.25 MHz and 25 MHz.
200
270
ps
t8
Output Skew
Skew between output to output on the same
bank
75
ps
t9 4
4.Includes loading the configuration bits from EEPROM to PLL registers. It does not include EEPROM programming/write time.
Lock Time
PLL lock time from power-up
10
20
ms
t10 5
5.Actual PLL lock time depends on the loop configuration.
Lock Time
PLL lock time from shutdown mode
2
ms
KVCXO
VCXO Gain
VIN = VDD/2 ± 1V
75
100
ppm/V
Crystal Pullability 6
6.With a pullable crystal that conforms to IDT’s specifications.
0V < VIN < 3.3V
-100
100
ppm
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| 5V19EE904NLGI8 | 功能描述:时钟发生器及支持产品 EEPROM PROGRAMMABLE PLL AND VCXO RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 5V1A-ADAPTER | 制造商:Distributed By MCM 功能描述:5V 1A Switching AC Power Supply - Micro USB |
| 5V1A-USB | 制造商:Gravitech 功能描述:USB WALL ADAPTER 5V 1A |
| 5V1BC | 制造商:SEMTECH_ELEC 制造商全称:SEMTECH ELECTRONICS LTD. 功能描述:Silicon Epitaxial Planar Zener Diodes |
| 5V1BCA | 制造商:SEMTECH_ELEC 制造商全称:SEMTECH ELECTRONICS LTD. 功能描述:Silicon Epitaxial Planar Zener Diodes |
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