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| 型号： | 78Q8430EBST#DB |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 29/88页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 78Q8430 |
| 标准包装： | 1 |
| 系列： | * |
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DS_8430_001
78Q8430 Data Sheet
Rev. 1.2
35
For an arbitrary unicast filter number N, the following procedure should be used to set the address and
mask values:
STEP 1. Write address and mask byte [0] to the CAM. CAM rule 0x70+N should be written as shown in
the following table:
Reg.
Field
Value to write
CAR
ADDR
0x70+N
RMR
Data Match
Value of MAC address byte [0]
Data Mask
Value of mask byte [0] from the Wild Card setting (0xFF is
for a perfect match)
Previous Hit Match
0x00 to disable the filter
Previous Hit Mask
0x00
RCR
Byte Offset
Retain default: 0x00
Interrupt
Retain default: 0
Control Logic Action
Retain default: NOP
Match Control
Retain default: MD
STEP 2. Write address and mask byte [1] through byte [4] to the CAM. For each byte the CAM rule
indicated by Table 24 based on the filter number, N, and byte number should be written as
follows.
Reg.
Field
Value to write
CAR
ADDR
byte [1]:
byte [2]:
byte [3]:
byte [4]:
0x68+N
0x58+N
0x50+N
0x40+N
RMR
Data Match
Value of MAC address byte [1] … byte [4]
Data Mask
Value of mask byte [1] . . . byte [4]
Previous Hit Match
Value of the CAM rule used by the previous byte
Previous Hit Mask
0x7F
RCR
Byte Offset
Retain default: 0x00
Interrupt
Retain default: 0
Control Logic Action
Retain default: NOP
Match Control
Retain default: MD
Unlike the settings for byte [0], the Previous Hit Mask field is set to 0x7F and the Previous Hit
Match field is always set to the value of the CAM rule used by the previous byte. As an
example, the Previous Hit Mask fields for filter #1 would be 0x71, 0x69, 0x59 and 0x51, for byte
[1] through byte [4] respectively.
STEP 3. Write address and mask byte [5] to the CAM. CAM rule 0x30+N should be written as follows.
Reg.
Field
Value to write
CAR
ADDR
0x30+N
RMR
Data Match
Value of MAC address byte [5]
Data Mask
Value of mask byte [5]
Previous Hit Match
Set to the CAM rule that was used for byte [4] (0x40+N).
Previous Hit Mask
0x7F
RCR
Byte Offset
Retain default: 0x00
Interrupt
Retain default: 0
Control Logic Action
Set to TAX
Match Control
Retain default: MD
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