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| 型号： | 935270523518 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件页数： | 10/93页 |
| 文件大小： | 2118K |
| 代理商： | 935270523518 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
18 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Description of the ow diagram:
Reset
This includes hardware reset by pin RESET and software reset by the
HcSoftwareReset command (A9H). The reset function will clear all the HC’s
internal control registers to their reset status. After reset, the HCD must initialize
the ISP1160 USB HC by setting some registers.
Initialize HC
It includes:
– Setting the physical size for the HC’s internal FIFO buffer RAM by setting the
HcITLBufferLength register (2AH - Read, AAH - Write) and the
HcATLBufferLength register (2BH - Read, ABH - Write)
– Setting the HcHardwareConguration register according to requirements
– Clearing interrupt events, if required
– Enabling interrupt events, if required
– Setting the HcFmInterval register (0DH - Read, 8DH - Write)
– Setting the HC’s Root Hub registers
– Setting the HcControl register to move the HC into USB Operational state
See also Section 9.5.
Entry
The normal entry point. The microprocessor returns to this point when there are
HC requests.
Need USB trafc
USB devices need the HC to generate USB trafc when they have USB trafc
requests such as:
– Connecting to or disconnecting from downstream ports
– Issuing the Resume signal to the HC
To generate USB trafc, the HCD must enter the USB transaction loop.
Fig 15. The ISP1160 HC operating ow.
MGT948
Need
USB traffic?
Prepare PTD data in
P system RAM
Initialize
HC
Transfer PTD data into
HC FIFO buffer RAM
HC performs USB transactions
via USB bus I/F
HC informs HCD of
USB traffic results
HC interprets
PTD data
Exit
Entry
HC state =
USB_Operational
no
yes
Reset
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