Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
10 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.3 Microprocessor read/write the ISP1160’s internal control registers
by PIO mode
8.3.1
I/O port addressing
Table 3 shows the ISP1160’s I/O port addressing. Complete decoding of the I/O port
address should include the chip select signal CS and the address line A0. However,
the direction of access of I/O ports is controlled by the RD and WR signals. When RD
is LOW, the microprocessor reads data from the ISP1160’s data port. When WR is
LOW, the microprocessor writes a command to the command port, or writes data to
the data port.
Figure 5 illustrates how an external microprocessor accesses the ISP1160’s internal
control registers.
8.3.2
Register access phases
The ISP1160’s register structure is a command-data register pair structure. A
complete register access cycle comprises a command phase followed by a data
phase. The command (also known as the index of a register) points the ISP1160 to
the next register to be accessed. A command is 8 bits long. On a microprocessor’s
16-bit data bus, a command occupies the lower byte, with the upper byte lled with
zeros.
Figure 6 shows a complete 16-bit register access cycle for the ISP1160. The
microprocessor writes a command code to the command port, and then reads from or
writes the data word to the data port. Take the example of a microprocessor
attempting to read a chip’s ID, which is saved in the HC’s HcChipID register (27H,
read only) where its command code is 27H, read only. The 16-bit register access
cycle is therefore:
Table 3:
I/O port addressing
Port
CS
[A0]
(Bin)
Access
Data bus width
(bits)
Description
0
R/W
16
HC data port
1
0
1
W
16
HC command port
When A0 = 0, microprocessor accesses the data port.
When A0 = 1, microprocessor accesses the command port.
Fig 5.
Access to internal control registers.
004aaa075
CMD/DATA
SWITCH
Commands
Control registers
Command register
data port
A0
command port
..
.
Host bus I/F
1
0