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参数资料
| 型号： | ACS8509 |
| 元件分类： | 数字传输电路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP100 |
| 封装： | LQFP-100 |
| 文件页数： | 28/68页 |
| 文件大小： | 703K |
| 代理商： | ACS8509 |
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ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 2.00/January 2006 Semtech Corp.
Page 34
www.semtech.com
ACS8509 SETS
This 14-bit integer is used as the divisor for any input applied to SEC1 to SEC4 to get
the phase locking frequency desired. Only active for inputs with the DivN bit set to
“1”. This will cause the input frequency to be divided by (N+1) prior to phase
comparison, e.g. program N to:
((input freq)/ 8 kHz) -1
The reference_source_frequency bits should be set to reflect the closest spot
frequency to the input frequency, but must be lower than the input frequency.
Bits (7:0) cnfg_freq_divn bits (7:0).
00000000
Bits (7:6) Unused.
Bits (5:0) cnfg_freq_divn bits (13:8).
XX000000
This 7-bit register allows global configuration of monitors and control of phase build-
out.
Bit 7 Unused.
Bit 6
=1 Enables value of the main_ref_failed interrupt to be driven out of pin TDO,
=0 Disables value of the main_ref_failed interrupt from being driven out of pin TDO
(default).
Bit 5
=1 Enables ultra fast switching: Allows the DPLL to raise an inactivity alarm on the
currently selected source after missing only a few cycles. See “Ultra Fast Switching”
=0 Normal operation (default).
Bit 4
Unused.
Bit 3
=1 Will freeze the output phase relationship with the current input to output phase
offset,
=0 Allows changes in input to output phase offset (Normal phase buildout mode)
(default).
Bit 2
=1 Enables phase build out (default),
=0 DPLL will always lock to 0°.
Bits (1:0) are for configuring frequency monitors- 00 = off, 01 = 15 ppm (default),
others are reserved for future use.
X0000101
Bits (7:0) set the value in the leaky bucket that causes the activity alarm to be raised.
00000110
Bits (7:0) set the value in the leaky bucket that causes the activity alarm to be
cleared.
00000100
Bits (7:0) set the maximum value that the leaky bucket can reach given an inactive
input.
00001000
Table 14 Register Description (cont...)
Addr.
(Hex)
Register Name
Description
Default Value (Bin)
相关PDF资料 |
PDF描述 |
|---|---|
| ACS8946T | ATM/SONET/SDH SUPPORT CIRCUIT, QCC48 |
| ACS8946 | ATM/SONET/SDH SUPPORT CIRCUIT, QCC48 |
| ACT-141223-2R | 1200 MHz - 1400 MHz RF/MICROWAVE NARROW BAND LOW POWER AMPLIFIER |
| ACT-141223-4R | 1200 MHz - 1400 MHz RF/MICROWAVE NARROW BAND LOW POWER AMPLIFIER |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ACS8509T | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
| ACS8510 | 制造商:Semtech Corporation 功能描述:Timing Source 100-Pin LQFP |
| ACS8510_03 | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
| ACS8510REV2.1 | 制造商:Semtech Corporation 功能描述:Timing Source 100-Pin LQFP |
| ACS8510REV2.1SETS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
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