ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 2.00/January 2006 Semtech Corp.
Page 13
www.semtech.com
ACS8509 SETS
Figure 4 Minimum Input Jitter Tolerance (DS1/E1)
Low Jitter Multiple E1/DS1 Outputs
This feature is activated using the cnfg_control1 register.
This sends a frequency of twice the Dig2 rate (see reg
addr 39h, bits 7:6) to the APLL instead of the normal
77.76 MHz. For this feature to be used, the Dig2 rate
must only be set to 12352 kHz/16384 kHz using the
cnfg_T0_output_frequencies register. The normal OC-3
rate outputs are then replaced with E1/DS1 multiple
rates. The E1(SONET)/DS1(SDH) selection is made in the
same way as for Dig2 using the cnfg_T0_output_enable
register.
Table 11 shows the relationship between primary output
frequencies and the corresponding output in E1/DS1
mode, and from which output they are available.
Output Wander and Jitter
Wander and jitter present on the output clocks are
dependent on:
1. The magnitude of wander and jitter on the selected
input reference clock (in Locked mode).
2. The internal wander and jitter transfer characteristic
(in Locked mode).
3. The jitter on the local oscillator clock.
4. The wander on the local oscillator clock (in Holdover
mode).
Wander and jitter are treated in different ways to reflect
their differing impacts on network design. Jitter is always
strongly attenuated, whilst wander attenuation can be
varied to suit the application and operating state. Wander
and jitter attenuation is performed using a digital phase
locked loop (DPLL) with a programmable bandwidth. This
gives a transfer characteristic of a low pass filter, with a
programmable pole. It is sometimes necessary to change
the filter dynamics to suit particular circumstances - one
example being when locking to a new source, the filter can
be opened up to reduce locking time and can then be
gradually tightened again to remove wander. Since
wander represents a relatively long-term deviation from
the nominal operating frequency, it affects the rate of
supply of data to the network element. Strong wander
attenuation limits the rate of consumption of data to
within a smaller range, so a larger buffer store is required
to prevent data loss. But, since any buffer store potentially
A1
A2
Jitter and Wander Frequency (log scale)
Peak-to-peak Jitter and Wander Amplitude
(log scale)
f1
f2
f3
f4
F8530D_004MINIPJITTOLDS1E1_02
Table 9 Amplitude and Frequency Values for Jitter Tolerance (DS1/E1)
Type
Spec.
Amplitude (UIp-p)Frequency (Hz)
A1
A2
F1
F2
F3
F4
DS1
5
0.1
10
500
8 k
40 k
E1
1.5
0.2
20
2.4 k
18 k
100k