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参数资料
| 型号： | ACS8509 |
| 元件分类： | 数字传输电路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP100 |
| 封装： | LQFP-100 |
| 文件页数： | 68/68页 |
| 文件大小： | 703K |
| 代理商： | ACS8509 |
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ADVANCED COMMUNICATIONS
FINAL
DATASHEET
Revision 2.00/January 2006 Semtech Corp.
Page 9
www.semtech.com
ACS8509 SETS
The minimum being 0 and the maximum 65535, gives a
-700 ppm to +500 ppm adjustment range of the output
frequencies.
For example, if the crystal was oscillating at 12.8 MHz
+ 5 ppm, then the calibration value in the register to give
a -5 ppm adjustment in output frequencies to
compensate for the crystal inaccuracy, would be:
39321 - (5 / 0.02) = 39071 (decimal)
Input Interfaces
The ACS8509 supports up to four input reference clock
sources from input types TIN1, TIN2 and TIN3 using TTL/
CMOS I/O technologies. These interface technologies
support +3.3 V and +5 V operation.
Over-Voltage Protection
The ACS8509 may require Over-Voltage Protection on
input reference clock ports according to ITU
Recommendation K.41. Semtech protection devices are
recommended for this purpose (see separate Semtech
data book).
Input Reference Clock Ports
Table 6 gives details of the input reference ports, showing
the input technologies and the range of frequencies
supported on each port; the default spot frequencies and
default priorities assigned to each port on power-up or by
reset are also shown. Note that SDH and SONET networks
use different default frequencies; the network type is pin-
selectable using the SONSDHB pin). Specific frequencies
and priorities are set by configuration.
Although each input port is shown as belonging to one of
the types, TIN1, TIN2 or TIN3, they are fully interchangeable
as long as the selected speed is within the maximum
operating speed of the input port technology.
SDH and SONET networks use different default
frequencies; the network type is selectable using the
config_mode register 34 Hex, bit 2.
For SONET, config_mode register 34 Hex, bit 2 = 1, for
SDH config_mode register 34 Hex, bit 2 = 0. On power-up
or by reset, the default will be set by the state of the
SONSDHB pin (pin 100). Specific frequencies and
priorities are set by configuration.
TTL ports (compatible also with CMOS signals) support
clock speeds up to 100 MHz, with the highest spot
frequency being 77.76 MHz. The actual spot frequencies
supported are:
2 kHz,
4 kHz,
8 kHz (and N x 8 kHz),
1.544 MHz (SONET)/2.048 MHz (SDH),
6.48 MHz,
19.44 MHz,
25.92 MHz,
38.88 MHz,
51.84 MHz,
77.76 MHz.
The frequency selection is programmed via the
cnfg_ref_source_frequency register. The internal DPLL
will normally lock to the selected input at the frequency of
the input, e.g. 19.44 MHz will lock the DPLL phase
comparisons at 19.44 MHz. It is, however, possible to
utilize an internal pre-divider to the DPLL to divide the
input frequency before it is used for phase comparisons in
the DPLL. This pre-divider can be used in one of 2 ways:
1. Any of the supported spot frequencies can be divided
to 8 kHz by setting the lock8K bit (bit 6) in the
appropriate cnfg_ref_source_frequency register
location. For good jitter tolerance for all frequencies
and for operation at 19.44 MHz and above, use
lock8K. It is possible to choose which edge of the
8 kHz input to lock to, by setting the appropriate bit of
the cnfg_control1 register.
2. Any multiple of 8 kHz between 1544 kHz to 100 MHz
can be supported by using the DivN feature (bit 7 of
the cnfg_ref_source_frequency register). Any
reference input can be set to use DivN independently
of the frequencies and configurations of the other
inputs.
Any reference input with the DivN bit set in the
cnfg_ref_source_frequency register will employ the
internal pre-divider prior to the DPLL locking.
The cnfg_freq_divn register contains the divider ratio N
where the reference input will get divided by (N+1) where
0<N<214-1. The cnfg_ref_source_frequency register
must be set to the closest supported spot frequency to the
input frequency, but must be lower than the input
frequency. When using the DivN feature the post-divider
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相关代理商/技术参数 |
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|---|---|
| ACS8509T | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
| ACS8510 | 制造商:Semtech Corporation 功能描述:Timing Source 100-Pin LQFP |
| ACS8510_03 | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
| ACS8510REV2.1 | 制造商:Semtech Corporation 功能描述:Timing Source 100-Pin LQFP |
| ACS8510REV2.1SETS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Synchronous Equipment Timing Source for SONET or SDH Network Elements |
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