参数资料
| 型号： | AD5735ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/48页 |
| 文件大小： | 0K |
| 描述： | IC DAC QUAD VOLT CUR 64-LFCSP |
| 标准包装： | 1 |
| 设置时间： | 18µs |
| 位数： | 12 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 托盘 |
| 输出数目和类型： | 4 电流，4 电压 |
| 采样率（每秒）： | * |
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Data Sheet
AD5735
Rev. C | Page 31 of 48
ENABLING THE OUTPUT
To correctly write to and set up the part from a power-on
condition, use the following sequence:
1. Perform a hardware or software reset after initial power-on.
2. Configure the dc-to-dc converter supply block. Set the
dc-to-dc switching frequency, the maximum output voltage
allowed, and the dc-to-dc converter phase between channels.
3. Configure the DAC control register on a per-channel basis.
Select the output range, and enable the dc-to-dc converter
block (DC_DC bit). Other control bits can also be config-
ured. Set the INT_ENABLE bit, but do not set the OUTEN
(output enable) bit.
4. Write the required code to the DAC data register. This step
implements a full internal DAC calibration. For reduced
output glitch, allow at least 200 s before performing Step 5.
5. Write to the DAC control register again to enable the
output (set the OUTEN bit).
Figure 73 provides a flowchart of this sequence.
POWER ON.
STEP 1: PERFORM A SOFTWARE/HARDWARE RESET.
STEP 4:
STEP 2: WRITE TO DC-TO-DC CONTROL REGISTER TO
SET DC-TO-DC CLOCK FREQUENCY, PHASE,
AND MAXIMUM VOLTAGE.
STEP 3: WRITE TO DAC CONTROL REGISTER. SELECT
THE DAC CHANNEL AND OUTPUT RANGE.
SET THE DC_DC BIT AND OTHER CONTROL
BITS AS REQUIRED. SET THE INT_ENABLE BIT
BUT DO NOT SET THE OUTEN BIT.
STEP 5:
09961-
073
WRITE TO ONE OR MORE DAC DATA REGISTERS.
WRITE TO DAC CONTROL REGISTER. RELOAD
ALLOW AT LEAST 200s BETWEEN STEP 3
AND STEP 5 FOR REDUCED OUTPUT GLITCH.
SEQUENCE AS IN STEP 3. SET THE OUTEN
BIT TO ENABLE THE OUTPUT.
Figure 73. Programming Sequence to Correctly Enable the Output
Reprogramming the Output Range
When changing the range of an output, the same sequence
described in the Enabling the Output section should be used.
It is recommended that the range be set to 0 V (zero scale or
midscale) before the output is disabled. Because the dc-to-dc
switching frequency, maximum output voltage, and phase have
already been selected, there is no need to reprogram these values.
Figure 74 provides a flowchart of this sequence.
STEP 3: WRITE VALUE TO THE DAC DATA REGISTER.
STEP 1: WRITE TO CHANNEL’S DAC DATA
REGISTER. SET THE OUTPUT
TO 0V (ZERO OR MIDSCALE).
STEP 2: WRITE TO DAC CONTROL REGISTER.
SET THE NEW OUTPUT RANGE. KEEP THE
DC_DC BIT AND THE INT_ENABLE BIT SET.
STEP 4: WRITE TO DAC CONTROL REGISTER.
RELOAD SEQUENCE AS IN STEP 2.
09961-
074
CHANNEL OUTPUT IS ENABLED.
DISABLE THE OUTPUT (OUTEN = 0) AND
SET THE OUTEN BIT TO ENABLE THE
OUTPUT.
Figure 74. Programming Sequence to Change the Output Range
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