参数资料
| 型号： | AD5757ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/44页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT QUAD 64-LFCSP |
| 特色产品： | AD5755 / AD5755-1 / AD5757 DACs |
| 标准包装： | 1 |
| 设置时间： | 15µs |
| 位数： | 16 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 管件 |
| 输出数目和类型： | * |
| 采样率（每秒）： | * |
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Data Sheet
AD5757
Rev. D | Page 33 of 44
Status Register
The status register is a read only register. This register contains
any fault information as a well as a ramp active bit and a user
toggle bit. When the STATREAD bit in the main control
register is set, the status register contents can be read back on
the SDO pin during every write sequence. Alternatively, if the
STATREAD bit is not set, the status register can be read using
the normal readback operation.
Table 28. Decoding the Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC-
DCD
DC-
DCC
DC-
DCB
DC-
DCA
User
toggle
PEC
error
Ramp
active
Over
TEMP
I
OUT_D
fault
I
OUT_C
fault
I
OUT_B
fault
I
OUT_A
fault
1 X = don’t care.
Table 29. Status Register Options
Bit
Description
DC-DCD
This bit is set on Channel D if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_D fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCC
This bit is set on Channel C if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_C fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCB
This bit is set on Channel B if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_B fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCA
This bit is set on Channel A if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_A fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
User toggle
User toggle bit. This bit is set or cleared via the software register. This can be used to verify data communications if
needed.
PEC Error
Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active
This bit is set while any one of the output channels is slewing (slew rate control is enabled on at least one channel).
Over TEMP
This bit is set if the AD5757 core temperature exceeds approximately 150°C.
I
OUT_D Fault
This bit is set if a fault is detected on the I
OUT_D pin.
I
OUT_C Fault
This bit is set if a fault is detected on the I
OUT_C pin.
I
OUT_B Fault
This bit is set if a fault is detected on the I
OUT_B pin.
I
OUT_A Fault
This bit is set if a fault is detected on the I
OUT_A pin.
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相关代理商/技术参数 |
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| AD5757ACPZ-REEL7 | 功能描述:IC DAC 16BIT QUAD IOUT 64LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
| AD5757X | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD575JD | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575JN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KD | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 10-Bit |
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