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参数资料
| 型号： | AD6623ABC |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 通信及网络 |
| 英文描述： | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA196 |
| 封装： | CSPBGA-196 |
| 文件页数： | 19/40页 |
| 文件大小： | 381K |
| 代理商： | AD6623ABC |
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REV. 0
AD6623
–19–
Table V. RCF Control Registers
Channel
Address
Bit
Width
Description
0x0A
0x0B
0x0C
16
8
10
15
–
8: N
RCF
–
1 B; 7
–
0: N
RCF
–
1 A
7
–
0: O
RCF
9: Ch. A Compact FIR Input Word Length
0: 16 bits
–
8 I followed by 8 Q
1: 24 bits
–
12 I followed by 12 Q
8: Ch. A RCF PRBS Enable
7: Ch A RCF PRBS Length
0: 15
1: 8,388,607
6
–
4: Ch. A RCF Mode Select
000 = FIR
001 = p/4-DQPSK Modulator
010 = GMSK Look-Up Table
011 = MSK Look-Up Table
100 = FIR compact mode
101 = 8-PSK
110 = 3p/8-8PSK Modulator
111 = QPSK Look-Up Table
3
–
0: Ch. A RCF Taps per Phase
7
–
6: RCF Coarse Scale (g):
00 = 0 dB
01 =
–
6 dB
10 =
–
12 dB
11 =
–
18 dB
5: Ch. A Allpass Ph. Eq. Enable
4
–
0: Serial Clock Divider (1, ..., 32)
15
–
2: Ch. A Unsigned Scale Factor
1
–
0: Reserved
17
–
16: Ch. A Time Slot Sync Select
00: Sync0 (See 0x001 Time Slot)
01: Sync1
10: Sync2
11: Sync3
15
–
0: Ch. A RCF Scale Hold-Off Counter
1) Ramp Down (if Ramp is enabled)
2) Update Scale and Mode
3) Ramp Up (if Ramp is enabled)
15
–
0: Ch. A RCF Phase EQ Coef1
15
–
0: Ch. A RCF Phase EQ Coef2
15
–
0: Ch. A RCF MPSK Magnitude 0
15
–
0: Ch. A RCF MPSK Magnitude 1
15
–
0: Ch. A RCF MPSK Magnitude 2
15
–
0: Ch. A RCF MPSK Magnitude 3
7: Reserved
6: Ch. A Serial Data Frame Select
0: Serial Data Frame Request
1: Serial Data Frame End
0x0D
8
0x0E
16
0x0F
18
0x110
0x111
0x112
0x113
0x114
0x115
0x116
16
16
16
16
16
16
8
Channel
Address
Bit
Width Description
5: Ch. A External SDFI Select
0: Internal SDFI
1: External SDFI
4: Ch. A SCLK Slave Select
0: Master
1: Slave
3: Ch. A Serial Fine Scale Enable
2: Ch. A Serial Time Slot Sync Enable
(ignored in FIR mode)
1: Ch. A Ramp Interpolation Enable
0: Ch. A Ramp Enable
5
–
0: Ch. A Mode 0 Ramp Length, R0
–
1
5
–
0: Ch. A Mode 1 Ramp Length, R1
–
1
4
–
0: Ch. A Ramp Rest Time, Q
Reserved
15
–
0: Ch. A Data Memory
15
–
14: Reserved
13
–
0: Ch. A Power Ramp Memory
15
–
0: Ch. A Coefficient Memory
This address is mirrored at 0x900
–
0x97F
and contiguously extended at
0x980
–
0x9FF
0x117
0x118
0x119
0x11A
–
0x11F
0x120
–
0x13F 16
0x140
–
0x17F 16
6
6
5
0x180
–
0x1FF 16
PSK MODULATOR
The PSK Modulator is an AD6623 extension feature that is
only available when the control register bit 0x000:7 is high.
The PSK Modulator creates 32-bit complex inputs to the
Interpolating FIR Filter from two or three data bits captured
by the serial port. The FIR Filter operates exactly as if the 32-
bit word came directly from the serial port. There are three
PSK modulation options to choose from: /4-DQPSK, 8-PSK,
and 3 /8-8-PSK. Every symbol of any of these modulations
can be represented by one of the 16 phases shown in Figure 21.
0
Figure 21. 16-Phase Modulations
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6623ABCZ | 制造商:Analog Devices 功能描述:Signal Processor 196-Pin CSP-BGA |
| AD6623AS | 制造商:Analog Devices 功能描述:Signal Processor 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL, 104 MSPS DIGITAL TSP - Bulk |
| AD6623ASZ | 功能描述:IC TSP 4CHAN 104MSPS 128MQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD6623BC/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| AD6623PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
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