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参数资料
| 型号： | AD6624AS |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 通信及网络 |
| 英文描述： | Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP128 |
| 封装： | PLASTIC, MQFP-128 |
| 文件页数： | 37/40页 |
| 文件大小： | 506K |
| 代理商： | AD6624AS |
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REV. B
AD6624
–37–
EXTEST (3’b000) Places the IC into an external boundary-test
mode and selects the boundary-scan register to be connected
between TDI and TDO. During this, the boundary-scan regis-
ter is accessed to drive test data off-chip via boundary outputs
and receive test data off-chip from boundary inputs.
IDCODE (3’b001) Allows the IC to remain in its functional
mode and selects device ID register to be connected between
TDI and TDO. Accessing the ID register does not interfere
with the operation of the IC.
SAMPLE/PRELOAD (3’b010) Allows the IC to remain in
normal functional mode and selects the boundary-scan register
to be connected between TDI and TDO. The boundary-scan
register can be accessed by a scan operation to take a sample of
the functional data entering and leaving the IC. Also, test
data can be preloaded into the boundary scan register before
an EXTEST instruction.
HIGHZ (3’b011) Sets all outputs to high impedance state.
Selects the 1-bit bypass register to be connected between
TDI and TDO.
CLAMP (3’b100) Sets the outputs of the IC to logic levels
determined by the boundary-scan register and selects the 1-bit
bypass register to be connected between TDI and TDO. Before
this instruction, boundary-scan data can be preloaded with
the SAMPLE/PRELOAD instruction.
BYPASS (3’b111) Allows the IC to remain in normal functional
mode and selects 1-bit bypass register between TDI and TDO.
During this instruction, serial data is transferred from TDI to
TDO without affecting operation of the IC.
INTERNAL WRITE ACCESS
Up to 20 bits of data (as needed) can be written by the process
described below. Any high order bytes that are needed are writ-
ten to the corresponding data registers defined in the external
3-bit address space. The least significant byte is then written to
DR0 at address (000). When a write to DR0 is detected, the
internal microprocessor port state machine then moves the data
in DR2-DR0 to the internal address pointed to by the address in
the LAR and AMR.
Write Pseudocode
void write_micro(ext_address, int data);
main();
{
/
*
This code shows the programming of the NCO phase offset
register using the write_micro function as defined above. The
variable address is the External Address A[2:0] and data is the
value to be placed in the external interface register.
Internal Address = 0x087
*
/
// holding registers for NCO phase byte wide access data
int d1, d0;
// NCO frequency word (16-bits wide)
NCO_PHASE = 0xCBEF;
// write ACR
write_micro(7, 0x03);
// write CAR
write_micro(6, 0x03);
// write DR1 with D[15:8]
d1 = (NCO_PHASE & 0xFF00) >> 8;
write_micro(1, d1);
// write DR0 with D[7:0]
// On this write all data is transferred to the internal address
d0 = NCO_FREQ & 0xFF;
write_micro(0, d0);
} // end of main
INTERNAL READ ACCESS
A read is performed by first writing the CAR and AMR as with a
write. The data registers (DR2–DR0) are then read in the reverse
order that they were written. First, the least significant byte of
the data (D[7:0]) is read from DR0. On this transaction, the
high bytes of the data are moved from the internal address
pointed to by the CAR and AMR into the remaining data regis-
ters (DR2–DR1). This data can then be read from the data
registers using the appropriate 3-bit addresses. The number of
data registers used depends solely on the amount of data to be
read or written. Any unused bit in a data register should be
masked out for a read.
Read Pseudocode
int read_micro(ext_address);
main();
{
/
*
This code shows the reading of the first RCF coefficient using
the read_micro function as defined above. The variable address
is the External Address A[2..0].
Internal Address = 0x000
*
/
// holding registers for the coefficient
int d2, d1, d0;
// coefficient (20-bits wide)
long coefficient;
// write AMR
write_micro(7, 0x00);
// write LAR
write_micro(6, 0x00);
/
*
read D[7:0] from DR0, All data is moved from the Internal
Registers to the interface registers on this access
*
/
d0 = read_micro(0) & 0xFF;
// read D[15:8] from DR1
d1 = read_micro(1) & 0xFF;
// read D[23:16] from DR2
d2 = read_micro(2) & 0x0F;
coefficient = d0 + (d1 << 8) + (d2 << 16);
} // end of main
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6624AS/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) |
| AD6624S/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
| AD662AQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:12-Bit Digital-to-Analog Converter |
| AD662BQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:12-Bit Digital-to-Analog Converter |
| AD662JN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:12-Bit Digital-to-Analog Converter |
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