参数资料
型号: AD7194BCPZ
厂商: Analog Devices Inc
文件页数: 1/57页
文件大小: 0K
描述: IC ADC 24BIT SPI 4.8K 32-LFCSP
产品培训模块: Weigh Scale Introduction
标准包装: 1
位数: 24
采样率(每秒): 4.8k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
电压电源: 模拟和数字
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-WQ(5x5)
包装: 管件
输入数目和类型: 8 个差分,单极;8 个差分,双极;16 个伪差分,单极;16 伪差分,双极
产品目录页面: 777 (CN2011-ZH PDF)
其它名称: AD7194BRUZ
AD7194BRUZ-ND
8-Channel, 4.8 kHz, Ultralow Noise,
24-Bit Sigma-Delta ADC with PGA
Data Sheet
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2009–2013 Analog Devices, Inc. All rights reserved.
FEATURES
Fast settling filter option
8 differential/16 pseudo differential input channels
RMS noise: 11 nV at 4.7 Hz (gain = 128)
15.5 noise-free bits at 2.4 kHz (gain = 128)
Up to 22 noise-free bits (gain = 1)
Offset drift: ±5 nV/°C
Gain drift: ±1 ppm/°C
Programmable gain (1 to 128)
Output data rate: 4.7 Hz to 4.8 kHz
Internal or external clock
Simultaneous 50 Hz/60 Hz rejection
4 general-purpose digital outputs
Power supply
AVDD: 3 V to 5.25 V
DVDD: 2.7 V to 5.25 V
Current: 4.65 mA
Temperature range: 40°C to +105°C
Package: 32-lead LFCSP
Interface
3-wire serial
SPI, QSPI, MICROWIRE, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
PLC/DCS analog input modules
Data acquisition
Strain gage transducers
Pressure measurement
Temperature measurement
Flow measurement
Weigh scales
Chromatography
Medical and scientific instrumentation
GENERAL DESCRIPTION
The AD7194 is a low noise, complete analog front end for high
precision measurement applications. It contains a low noise,
24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC).
The on-chip low noise gain stage means that signals of small
amplitude can interface directly to the ADC.
The device can be configured to have eight differential inputs or
sixteen pseudo differential inputs. The on-chip 4.92 MHz clock
can be used as the clock source to the ADC or, alternatively, an
external clock or crystal can be used. The output data rate from
the part can be varied from 4.7 Hz to 4.8 kHz.
The device has a very flexible digital filter, including a fast
settling option. Variables such as output data rate and settling
time are dependent on the option selected. For applications that
require all conversions to be settled, the AD7194 includes zero
latency.
The part operates with a power supply from 3 V to 5.25 V. It
consumes a current of 4.65 mA, and it is housed in a 32-lead
LFCSP package.
FUNCTIONAL BLOCK DIAGRAM
DVDD
DGND
REFIN1(+)
REFIN1(–)
AIN1/P3
AIN2/P2
AIN3/P1/REFIN2(+)
AIN4/P0/REFIN2(–)
AINCOM
AD7194
SERIAL
INTERFACE
AND
CONTROL
LOGIC
REFERENCE
DETECT
TEMP
SENSOR
DOUT/RDY
DIN
SCLK
CS
MCLK1 MCLK2
CLOCK
CIRCUITRY
AVDD
AGND
AIN5
AIN16
Σ-Δ
ADC
PGA
MUX
08566-
001
AVDD
AGND
Figure 1.
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