参数资料
| 型号： | AD7194BCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/57页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT SPI 4.8K 32-LFCSP |
| 产品培训模块： | Weigh Scale Introduction |
| 标准包装： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 4.8k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-WQ（5x5） |
| 包装： | 管件 |
| 输入数目和类型： | 8 个差分，单极；8 个差分，双极；16 个伪差分，单极；16 伪差分，双极 |
| 产品目录页面： | 777 (CN2011-ZH PDF) |
| 其它名称： | AD7194BRUZ AD7194BRUZ-ND |
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AD7194
Data Sheet
Rev. A | Page 30 of 56
ANALOG INPUT CHANNEL
The AD7194 uses flexible multiplexing so any of the analog
input pins AIN1 to AIN16 can be selected as a positive input or
a negative input (see Table 22 and Table 23). The AINCOM pin
can be a negative analog input pin only.
PGA
TO ADC
08566-
071
AVDD
BURNOUT
CURRENTS
AVDD
AIN1
AVDD
AIN2
AVDD
AIN15
AVDD
AIN16
AVDD
AINCOM
Figure 22. Analog Input Multiplexer Circuit
The channels are configured using bits CH7 to CH0 and bit
Pseudo in the configuration register (See Table 22 to Table 24).
The device can be configured to have eight differential inputs,
sixteen pseudo-differential inputs or a combination of both. The
inputs can be buffered or unbuffered. In the buffered mode (the
BUF bit in the configuration register is set to 1), the input channel
feeds into a high impedance input stage of the buffer amplifier.
Therefore, the input can tolerate significant source impedances and
is tailored for direct connection to external resistive type sensors
such as strain gages or resistance temperature detectors (RTDs).
When BUF = 0, the part is operated in the unbuffered mode.
This results in a higher analog input current. Note that this
unbuffered input path provides a dynamic load to the driving
source. Therefore, resistor/capacitor combinations on the input
pins can cause gain errors, depending on the output impedance
of the source that is driving the ADC input. Table 26 shows the
allowable external resistance/capacitance values for unbuffered
mode at a gain of 1 such that no gain error at the 18-bit level is
introduced.
Table 26. External R-C Combination for No 18-Bit Gain Error
C (pF)
R ()
50
1.4 k
100
850
500
300
1000
230
5000
30
The absolute input voltage range in buffered mode is restricted
to a range between AGND + 250 mV and AVDD 250 mV. Care
must be taken in setting up the common-mode voltage to not
exceed these limits; otherwise, linearity and noise performance
degrade.
The absolute input voltage in unbuffered mode includes the
range between AGND 50 mV and AVDD + 50 mV. The
negative absolute input voltage limit allows the possibility of
monitoring small true bipolar signals with respect to AGND.
PROGRAMMABLE GAIN ARRAY (PGA)
When the gain stage is enabled, the output from the buffer is
applied to the input of the PGA. The presence of the PGA
means that signals of small amplitude can be gained within the
AD7194 and still maintain excellent noise performance. For
example, when the gain is set to 128, the rms noise is 11 nV,
typically, when the output data rate is 4.7 Hz, which is equivalent
to 22.7 bits of effective resolution or 20 bits of noise-free
resolution.
The AD7194 can be programmed to have a gain of 1, 8, 16,
32, 64, and 128 by using Bit G2 to Bit G0 in the configuration
register. Therefore, with an external 2.5 V reference, the
unipolar ranges are from 0 mV to 19.53 mV to 0 V to 2.5 V,
and the bipolar ranges are from ±19.53 mV to ±2.5 V.
The analog input range must be limited to ±(AVDD 1.25 V)/gain
because the PGA requires some headroom. Therefore, if VREF =
AVDD = 5 V, the maximum analog input that can be applied to the
AD7194 is 0 V to 3.75 V/gain in unipolar mode or ±3.75 V/gain
in bipolar mode.
REFERENCE
The ADC has a fully differential input capability for the
reference channel. In addition, the user has the option of
selecting one of two external reference options (REFIN1(±)
or REFIN2(±)). The reference source for the AD7194 is
selected using the REFSEL bit in the configuration register.
The REFIN2(±) pins are dual purpose: they can function as
two general-purpose output pins or as reference pins. When
the REFSEL bit is set to 1, these pins automatically function as
reference pins.
The common-mode range for these differential inputs is from
AGND to AVDD. The reference voltage REFIN (REFINx(+)
REFINx()) is AVDD nominal, but the AD7194 is functional
with reference voltages from 1 V to AVDD. In applications where
the excitation (voltage or current) for the transducer on the
analog input also drives the reference voltage for the part, the
effect of the low frequency noise in the excitation source is removed
because the application is ratiometric. If the AD7194 is used in a
nonratiometric application, a low noise reference should be used.
The reference input is unbuffered; therefore, excessive R-C
source impedances introduce gain errors. R-C values similar to
those in Table 26 are recommended for the reference inputs.
Deriving the reference input voltage across an external resistor
means that the reference input sees significant external source
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| AD7194BCPZ-REEL | 功能描述:IC ADC 24BIT SPI 4.8KHZ 32LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| AD7194BCPZ-REEL7 | 功能描述:IC ADC 24BIT SPI 4.8KHZ 32LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
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| AD7195BCPZ | 制造商:Analog Devices 功能描述:IC ADC 24BIT 4.8KSPS CSP-32 |
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