参数资料
| 型号： | AD7195BCPZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/45页 |
| 文件大小： | 0K |
| 描述： | IC AFE 24BIT 4.8K 32LFSP |
| 设计资源： | Precision Weigh Scale Design Using AD7195 with Internal PGA and AC Excitation (CN0155) |
| 标准包装： | 1,500 |
| 位数： | 24 |
| 通道数： | 4 |
| 电压 - 电源，模拟： | 4.75 V ~ 5.25 V |
| 电压 - 电源，数字： | 2.7 V ~ 5.25 V |
| 封装/外壳： | 32-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-WQ（5x5） |
| 包装： | 带卷 (TR) |
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AD7195
Rev. 0 | Page 27 of 44
registers is inhibited to avoid loading incorrect coefficients to
these registers, and the ERR bit in the status register is set. If
the user is concerned about verifying that a valid reference is
in place every time a calibration is performed, the status of the
ERR bit should be checked at the end of the calibration cycle.
BIPOLAR/UNIPOLAR CONFIGURATION
The analog input to the AD7195 can accept either unipolar or
bipolar input voltage ranges. A bipolar input range does not
imply that the part can tolerate negative voltages with respect
to system AGND. In pseudo differential mode, signals are
referenced to AINCOM while in differential mode, signals are
referenced to the negative input of the differential pair. For
example, if AINCOM is 2.5 V and the AD7195 AIN1 analog
input is configured for unipolar mode with a gain of 2, the input
voltage range on the AIN1 pin is 2.5 V to 3.75 V when a 2.5 V
reference is used. If AINCOM is 2.5 V and the AD7195 AIN1
analog input is configured for bipolar mode with a gain of 2, the
analog input range on AIN1 is 1.25 V to 3.75 V.
The bipolar/unipolar option is chosen by programming the U/B
bit in the configuration register.
DATA OUTPUT CODING
When the ADC is configured for unipolar operation, the output
code is natural (straight) binary with a zero differential input
voltage resulting in a code of 00...00, a midscale voltage result-
ing in a code of 100...000, and a full-scale input voltage resulting
in a code of 111...111. The output code for any analog input
voltage can be represented as
Code = (2N × AIN × Gain)/VREF
When the ADC is configured for bipolar operation, the output
code is offset binary with a negative full-scale voltage resulting
in a code of 000...000, a zero differential input voltage resulting
in a code of 100...000, and a positive full-scale input voltage
resulting in a code of 111...111. The output code for any analog
input voltage can be represented as
Code = 2N – 1 × [(AIN × Gain/VREF) + 1]
where:
N = 24.
AIN is the analog input voltage.
Gain is the PGA setting (1 to 128).
BURNOUT CURRENTS
The AD7195 contains two 500 nA constant current generators,
one sourcing current from AVDD to AIN(+) and one sinking
current from AIN() to AGND, where AIN(+) is the positive
analog input terminal and AIN() is the negative analog input
terminal in differential mode and AINCOM in pseudo differ-
ential mode. The currents are switched to the selected analog
input pair. Both currents are either on or off, depending on the
burnout current enable (BURN) bit in the configuration
register. These currents can be used to verify that an external
transducer remains operational before attempting to take
measurements on that channel. After the burnout currents are
turned on, they flow in the external transducer circuit, and a
measurement of the input voltage on the analog input channel
can be taken. It will take some time for the burnout currents to
detect an open circuit condition as the currents will need to
charge any external capacitors
There are several reasons why a fault condition might be
detected. The front-end sensor may be open circuit. The front-
end sensor may be overloaded, or the reference may be absent
and the NOREF bit in the status register is set, thus clamping
the data to all 1s. Check these possibilities first. If the voltage
measured is 0 V, it may indicate that the transducer has short
circuited. The current sources work over the normal absolute
input voltage range specifications when the analog inputs are
buffered and chop is disabled.
AC EXCITATION
AC excitation of the bridge addresses many of the concerns
with thermocouple, offset, and drift effects encountered in
dc excited applications. In ac excitation, the polarity of the
excitation voltage to the bridge is reversed on alternate
cycles. The result is the elimination of dc errors at the
expense of a more complex system design. Figure 50 outlines
the connections for an ac excited bridge application based
on the AD7195.
The excitation voltage to the bridge must be switched on
alternate cycles. Transistor T1 to Transistor T4 in Figure 50
perform the switching of the excitation voltage. These transis-
tors can be discrete matched bipolar or MOS transistors, or a
dedicated bridge driver chip, such as the MIC4427 available
from Micrel Components, can be used to perform the task.
Since the analog input voltage and the reference voltage are
reversed on alternate cycles, the AD7195 must be synchronized
with this reversing of the excitation voltage. To allow the
AD7195 to synchronize itself with this switching, it provides
the logic control signals for the switching of the excitation
voltage. These signals are the nonoverlapping CMOS outputs
ACX1/ACX1 and ACX2/ACX2.
One of the problems encountered with ac excitation is the
settling time associated with the analog input signals after
the excitation voltage is switched. This is particularly true in
applications where there are long lead lengths from the bridge
to the AD7195. It means that the converter could encounter
errors because it is processing signals that are not fully settled.
The AD7195 includes a delay between the switching of the ac
excitation signals and the processing of data at the analog
inputs. The delay equals 100 μs when FS[9:0] equals 1 and
equals 200 μs for all other output data rates.
The AD7195 also scales the ac excitation switching frequency
in accordance with the output data rate. This avoids situations
where the bridge is switched at an unnecessarily faster rate than
the system requires.
The fact that the AD7195 can handle reference voltages, which
are the same as the excitation voltages, is particularly useful
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